Patrice L. Winder

Array ( [id] => 20035070 [patent_doc_number] => 20250173292 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-05-29 [patent_title] => NETWORK CREDIT RETURN MECHANISMS [patent_app_type] => utility [patent_app_number] => 19/030750 [patent_app_country] => US [patent_app_date] => 2025-01-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8395 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19030750 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20000822 [patent_doc_number] => 20250139044 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-05-01 [patent_title] => AUTOMATIC REPAIR METHOD AND APPARATUS FOR DEVICE, AND ELECTRONIC DEVICE AND STORAGE MEDIUM [patent_app_type] => utility [patent_app_number] => 19/006026 [patent_app_country] => US [patent_app_date] => 2024-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8084 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19006026 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20138138 [patent_doc_number] => 20250245182 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-07-31 [patent_title] => SMALL FORM FACTOR PC WITH BMC AND EXTENDED FUNCTIONALITY [patent_app_type] => utility [patent_app_number] => 18/999493 [patent_app_country] => US [patent_app_date] => 2024-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 1236 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18999493 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20296662 [patent_doc_number] => 20250321905 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-10-16 [patent_title] => System and Method to Efficiently Assist Time-Synchronous Media Streaming and Remote-Control Applications [patent_app_type] => utility [patent_app_number] => 18/937232 [patent_app_country] => US [patent_app_date] => 2024-11-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2423 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18937232 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19787397 [patent_doc_number] => 20250061076 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-02-20 [patent_title] => NETWORK ARCHITECTURE PROVIDING HIGH SPEED STORAGE ACCESS THROUGH A PCI EXPRESS FABRIC BETWEEN A STREAMING ARRAY AND A DEDICATED STORAGE SERVER [patent_app_type] => utility [patent_app_number] => 18/938153 [patent_app_country] => US [patent_app_date] => 2024-11-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15616 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18938153 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20195523 [patent_doc_number] => 20250272233 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-08-28 [patent_title] => STORAGE DEVICE, OPERATION METHOD THEREOF AND SYSTEM INCLUDING THE SAME [patent_app_type] => utility [patent_app_number] => 18/937814 [patent_app_country] => US [patent_app_date] => 2024-11-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10220 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18937814 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20043318 [patent_doc_number] => 20250181540 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-06-05 [patent_title] => ELECTRONIC DEVICE HAVING A PLURALITY OF CHIPLETS [patent_app_type] => utility [patent_app_number] => 18/935068 [patent_app_country] => US [patent_app_date] => 2024-11-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7485 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18935068 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20181254 [patent_doc_number] => 20250265212 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-08-21 [patent_title] => BUS MODULE AND SERVER [patent_app_type] => utility [patent_app_number] => 19/116303 [patent_app_country] => US [patent_app_date] => 2024-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3579 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19116303 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20587268 [patent_doc_number] => 20260072863 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-03-12 [patent_title] => Dynamic Lane Allocation On Power Limited, Dual Port PCIe Device [patent_app_type] => utility [patent_app_number] => 18/829622 [patent_app_country] => US [patent_app_date] => 2024-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 974 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18829622 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19660659 [patent_doc_number] => 20240427724 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-12-26 [patent_title] => SPREAD SPECTRUM CLOCK NEGOTIATION METHOD, AND PERIPHERAL COMPONENT INTERCONNECT EXPRESS DEVICE AND SYSTEM [patent_app_type] => utility [patent_app_number] => 18/829008 [patent_app_country] => US [patent_app_date] => 2024-09-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7654 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18829008 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20148241 [patent_doc_number] => 12382599 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-08-05 [patent_title] => Semiconductor memory device [patent_app_type] => utility [patent_app_number] => 18/738605 [patent_app_country] => US [patent_app_date] => 2024-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 26 [patent_no_of_words] => 30755 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 417 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18738605 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20123357 [patent_doc_number] => 20250238388 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-07-24 [patent_title] => DEVICE AND METHODS FOR SINGLE-CHIP PCIe VIRTUALIZATION [patent_app_type] => utility [patent_app_number] => 18/679048 [patent_app_country] => US [patent_app_date] => 2024-05-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18679048 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19558600 [patent_doc_number] => 20240370392 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-11-07 [patent_title] => CENTRALIZED INTERRUPT HANDLING FOR CHIPLET PROCESSING UNITS [patent_app_type] => utility [patent_app_number] => 18/667752 [patent_app_country] => US [patent_app_date] => 2024-05-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5741 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18667752 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19401687 [patent_doc_number] => 20240285198 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-29 [patent_title] => SYSTEM FOR DISPLAYING AND CONTROLLING MEDICAL MONITORING DATA [patent_app_type] => utility [patent_app_number] => 18/660846 [patent_app_country] => US [patent_app_date] => 2024-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 50338 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18660846 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20529133 [patent_doc_number] => 12547568 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-02-10 [patent_title] => System for link management between multiple communication chips [patent_app_type] => utility [patent_app_number] => 18/656182 [patent_app_country] => US [patent_app_date] => 2024-05-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 7669 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18656182 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20507203 [patent_doc_number] => 12541479 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-02-03 [patent_title] => Single-port and dual-port EDSFF media port control [patent_app_type] => utility [patent_app_number] => 18/649860 [patent_app_country] => US [patent_app_date] => 2024-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 0 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18649860 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19545139 [patent_doc_number] => 20240362175 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-31 [patent_title] => SYSTEM ON CHIP AND INTERRUPT ISOLATION METHOD [patent_app_type] => utility [patent_app_number] => 18/645904 [patent_app_country] => US [patent_app_date] => 2024-04-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10650 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 38 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18645904 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20310855 [patent_doc_number] => 20250328484 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-10-23 [patent_title] => LOW-POWER FRAME TRANSMISSION OVER A COMMUNICATION INTERCONNECT [patent_app_type] => utility [patent_app_number] => 18/642644 [patent_app_country] => US [patent_app_date] => 2024-04-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6880 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18642644 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19347511 [patent_doc_number] => 20240256474 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-01 [patent_title] => NETWORK INTERFACE CONTROLLER CONFIGURATION METHOD, APPARATUS, DEVICE, AND STORAGE MEDIUM [patent_app_type] => utility [patent_app_number] => 18/630597 [patent_app_country] => US [patent_app_date] => 2024-04-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8731 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 197 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18630597 [rel_patent_id] =>[rel_patent_doc_number] =>)