Patrice L. Winder

Array ( [id] => 16179119 [patent_doc_number] => 20200226087 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-07-16 [patent_title] => Terminal Device And Control Method Thereof [patent_app_type] => utility [patent_app_number] => 16/747296 [patent_app_country] => US [patent_app_date] => 2020-01-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 48333 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16747296 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15870425 [patent_doc_number] => 20200142616 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-05-07 [patent_title] => SHARING ALIAS ADDRESSES AMONG LOGICAL DEVICES [patent_app_type] => utility [patent_app_number] => 16/736811 [patent_app_country] => US [patent_app_date] => 2020-01-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11079 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16736811 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17269314 [patent_doc_number] => 11194741 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-12-07 [patent_title] => Control device and adjustment method [patent_app_type] => utility [patent_app_number] => 16/731565 [patent_app_country] => US [patent_app_date] => 2019-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4138 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16731565 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18855601 [patent_doc_number] => 11853179 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2023-12-26 [patent_title] => Detection of a DMA (direct memory access) memory address violation when testing PCIE devices [patent_app_type] => utility [patent_app_number] => 16/728338 [patent_app_country] => US [patent_app_date] => 2019-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4176 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16728338 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18015117 [patent_doc_number] => 11507413 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-11-22 [patent_title] => Tracking method, apparatus, device, and machine-readable medium [patent_app_type] => utility [patent_app_number] => 16/726669 [patent_app_country] => US [patent_app_date] => 2019-12-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 9895 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16726669 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15804747 [patent_doc_number] => 20200125516 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-23 [patent_title] => INPUT/OUTPUT COMMAND REBALANCING IN A VIRTUALIZED COMPUTER SYSTEM [patent_app_type] => utility [patent_app_number] => 16/724874 [patent_app_country] => US [patent_app_date] => 2019-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7496 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 170 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16724874 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16920134 [patent_doc_number] => 20210193226 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-06-24 [patent_title] => CENTRALIZED FIXED RATE SERIALIZER AND DESERIALIZER FOR BAD COLUMN MANAGEMENT IN NON-VOLATILE MEMORY [patent_app_type] => utility [patent_app_number] => 16/722538 [patent_app_country] => US [patent_app_date] => 2019-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12477 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16722538 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15804757 [patent_doc_number] => 20200125521 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-23 [patent_title] => REDUNDANCY IN A PCI EXPRESS SYSTEM [patent_app_type] => utility [patent_app_number] => 16/717196 [patent_app_country] => US [patent_app_date] => 2019-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9535 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16717196 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16494471 [patent_doc_number] => 10860513 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-12-08 [patent_title] => I3C hub promoting backward compatibility with I [patent_app_type] => utility [patent_app_number] => 16/712555 [patent_app_country] => US [patent_app_date] => 2019-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3217 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 223 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16712555 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16192969 [patent_doc_number] => 20200233818 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-07-23 [patent_title] => METHODS, FLASH MEMORY CONTROLLER, AND ELECTRONIC DEVICE FOR SD MEMORY CARD DEVICE [patent_app_type] => utility [patent_app_number] => 16/698910 [patent_app_country] => US [patent_app_date] => 2019-11-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8182 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 232 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16698910 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15967097 [patent_doc_number] => 20200167300 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-05-28 [patent_title] => NETWORK SWITCH WITH ENDPOINT AND DIRECT MEMORY ACCESS CONTROLLERS FOR IN-VEHICLE DATA TRANSFERS [patent_app_type] => utility [patent_app_number] => 16/697361 [patent_app_country] => US [patent_app_date] => 2019-11-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8415 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16697361 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17017158 [patent_doc_number] => 11086799 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-08-10 [patent_title] => Method and device for configuring controller in master control chip [patent_app_type] => utility [patent_app_number] => 16/688867 [patent_app_country] => US [patent_app_date] => 2019-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 9468 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16688867 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17346290 [patent_doc_number] => 20220012621 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-01-13 [patent_title] => SYSTEMS AND METHODS INVOLVING HYBRID QUANTUM MACHINES, ASPECTS OF QUANTUM INFORMATION TECHNOLOGY AND/OR OTHER FEATURES [patent_app_type] => utility [patent_app_number] => 17/295025 [patent_app_country] => US [patent_app_date] => 2019-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5959 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 22 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17295025 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17846649 [patent_doc_number] => 11436022 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-09-06 [patent_title] => Semiconductor memory device for hash solution and method of driving the same [patent_app_type] => utility [patent_app_number] => 16/599358 [patent_app_country] => US [patent_app_date] => 2019-10-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 7344 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16599358 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15715007 [patent_doc_number] => 20200104270 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-02 [patent_title] => METHOD AND SYSTEM FOR COMMUNICATING OVER A BUS [patent_app_type] => utility [patent_app_number] => 16/584105 [patent_app_country] => US [patent_app_date] => 2019-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10418 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 207 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16584105 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16818783 [patent_doc_number] => 11003613 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-05-11 [patent_title] => Eject pull mechanism for information handling system [patent_app_type] => utility [patent_app_number] => 16/578932 [patent_app_country] => US [patent_app_date] => 2019-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4852 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16578932 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16714190 [patent_doc_number] => 20210081337 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-03-18 [patent_title] => MEMORY CHIP CONNECTING A SYSTEM ON A CHIP AND AN ACCELERATOR CHIP [patent_app_type] => utility [patent_app_number] => 16/573805 [patent_app_country] => US [patent_app_date] => 2019-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12279 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16573805 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18218352 [patent_doc_number] => 11593291 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-02-28 [patent_title] => Methods and apparatus for high-speed data bus connection and fabric management [patent_app_type] => utility [patent_app_number] => 16/566829 [patent_app_country] => US [patent_app_date] => 2019-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 49 [patent_figures_cnt] => 49 [patent_no_of_words] => 22921 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16566829 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15656555 [patent_doc_number] => 20200090808 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-03-19 [patent_title] => FIRST AND SECOND COMMUNICATION PROTOCOL ARRANGEMENT FOR DRIVING PRIMARY AND SECONDARY DEVICES THROUGH A SINGLE PORT [patent_app_type] => utility [patent_app_number] => 16/562143 [patent_app_country] => US [patent_app_date] => 2019-09-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 54934 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16562143 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18735934 [patent_doc_number] => 11804679 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-10-31 [patent_title] => Flexible hand-switch circuit [patent_app_type] => utility [patent_app_number] => 16/562137 [patent_app_country] => US [patent_app_date] => 2019-09-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 52 [patent_figures_cnt] => 62 [patent_no_of_words] => 55349 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 209 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16562137 [rel_patent_id] =>[rel_patent_doc_number] =>)