Search

Patricia L Morris

Examiner (ID: 15529, Phone: (571)272-0688 , Office: P/1625 )

Most Active Art Unit
1625
Art Unit(s)
1203, 1201, 1612, 1209, 1625
Total Applications
3798
Issued Applications
2688
Pending Applications
142
Abandoned Applications
966

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 11644877 [patent_doc_number] => 09666265 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-05-30 [patent_title] => 'Semiconductor device' [patent_app_type] => utility [patent_app_number] => 14/967006 [patent_app_country] => US [patent_app_date] => 2015-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 16 [patent_no_of_words] => 7803 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14967006 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/967006
Semiconductor device Dec 10, 2015 Issued
Array ( [id] => 11753214 [patent_doc_number] => 09711232 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-07-18 [patent_title] => 'Dynamic non-volatile memory operation scheduling for controlling power consumption of solid-state drives' [patent_app_type] => utility [patent_app_number] => 14/967220 [patent_app_country] => US [patent_app_date] => 2015-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6546 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14967220 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/967220
Dynamic non-volatile memory operation scheduling for controlling power consumption of solid-state drives Dec 10, 2015 Issued
Array ( [id] => 11453324 [patent_doc_number] => 09576976 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-02-21 [patent_title] => 'Three dimensional memory device' [patent_app_type] => utility [patent_app_number] => 14/966154 [patent_app_country] => US [patent_app_date] => 2015-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6249 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 391 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14966154 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/966154
Three dimensional memory device Dec 10, 2015 Issued
Array ( [id] => 11599516 [patent_doc_number] => 09646692 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-05-09 [patent_title] => 'Programming verify for nonvolatile memory' [patent_app_type] => utility [patent_app_number] => 14/965670 [patent_app_country] => US [patent_app_date] => 2015-12-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 12 [patent_no_of_words] => 7069 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 216 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14965670 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/965670
Programming verify for nonvolatile memory Dec 9, 2015 Issued
Array ( [id] => 11417371 [patent_doc_number] => 09564204 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-02-07 [patent_title] => 'Multi-chip package and operating method thereof' [patent_app_type] => utility [patent_app_number] => 14/963972 [patent_app_country] => US [patent_app_date] => 2015-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4490 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14963972 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/963972
Multi-chip package and operating method thereof Dec 8, 2015 Issued
Array ( [id] => 15058343 [patent_doc_number] => 10459472 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-10-29 [patent_title] => Model predictive control optimization for power electronics [patent_app_type] => utility [patent_app_number] => 14/961030 [patent_app_country] => US [patent_app_date] => 2015-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 12 [patent_no_of_words] => 5850 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 225 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14961030 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/961030
Model predictive control optimization for power electronics Dec 6, 2015 Issued
Array ( [id] => 11672738 [patent_doc_number] => 20170161460 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-06-08 [patent_title] => 'Application Development System for Medical Pumps' [patent_app_type] => utility [patent_app_number] => 14/959622 [patent_app_country] => US [patent_app_date] => 2015-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5429 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14959622 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/959622
Application development system for medical pumps Dec 3, 2015 Issued
Array ( [id] => 11466536 [patent_doc_number] => 09583175 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-02-28 [patent_title] => 'Receiver equalization circuit with cross coupled transistors and/or RC impedance' [patent_app_type] => utility [patent_app_number] => 14/956870 [patent_app_country] => US [patent_app_date] => 2015-12-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 8188 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14956870 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/956870
Receiver equalization circuit with cross coupled transistors and/or RC impedance Dec 1, 2015 Issued
Array ( [id] => 11966852 [patent_doc_number] => 20170271005 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-09-21 [patent_title] => 'READING CIRCUIT FOR RESISTIVE MEMORY' [patent_app_type] => utility [patent_app_number] => 15/531782 [patent_app_country] => US [patent_app_date] => 2015-12-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5683 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15531782 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/531782
Reading circuit for resistive memory Nov 30, 2015 Issued
Array ( [id] => 11265724 [patent_doc_number] => 09490024 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2016-11-08 [patent_title] => 'Solid state storage device and reading control method thereof' [patent_app_type] => utility [patent_app_number] => 14/948800 [patent_app_country] => US [patent_app_date] => 2015-11-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 7658 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 183 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14948800 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/948800
Solid state storage device and reading control method thereof Nov 22, 2015 Issued
Array ( [id] => 10732775 [patent_doc_number] => 20160078926 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-03-17 [patent_title] => 'DUAL-PORT STATIC RANDOM ACCESS MEMORY (SRAM)' [patent_app_type] => utility [patent_app_number] => 14/948196 [patent_app_country] => US [patent_app_date] => 2015-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4816 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14948196 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/948196
Dual-port static random access memory (SRAM) Nov 19, 2015 Issued
Array ( [id] => 11233821 [patent_doc_number] => 09461056 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-10-04 [patent_title] => 'Non-volatile memory and semiconductor device' [patent_app_type] => utility [patent_app_number] => 14/930827 [patent_app_country] => US [patent_app_date] => 2015-11-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 14 [patent_no_of_words] => 6110 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14930827 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/930827
Non-volatile memory and semiconductor device Nov 2, 2015 Issued
Array ( [id] => 11897978 [patent_doc_number] => 09767917 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-09-19 [patent_title] => 'Mitigation scheme for SRAM functionality' [patent_app_type] => utility [patent_app_number] => 14/881718 [patent_app_country] => US [patent_app_date] => 2015-10-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 7459 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 190 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14881718 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/881718
Mitigation scheme for SRAM functionality Oct 12, 2015 Issued
Array ( [id] => 15608141 [patent_doc_number] => 10585124 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-03-10 [patent_title] => Power outage detection [patent_app_type] => utility [patent_app_number] => 14/879570 [patent_app_country] => US [patent_app_date] => 2015-10-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 4480 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14879570 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/879570
Power outage detection Oct 8, 2015 Issued
Array ( [id] => 11293907 [patent_doc_number] => 20160343839 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-11-24 [patent_title] => 'ELECTRONIC DEVICE' [patent_app_type] => utility [patent_app_number] => 14/879450 [patent_app_country] => US [patent_app_date] => 2015-10-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 8378 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14879450 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/879450
Electronic device Oct 8, 2015 Issued
Array ( [id] => 11753187 [patent_doc_number] => 09711205 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-07-18 [patent_title] => 'Method of use time management for semiconductor device and semiconductor device including use time managing circuit' [patent_app_type] => utility [patent_app_number] => 14/874568 [patent_app_country] => US [patent_app_date] => 2015-10-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 25 [patent_no_of_words] => 10646 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14874568 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/874568
Method of use time management for semiconductor device and semiconductor device including use time managing circuit Oct 4, 2015 Issued
Array ( [id] => 11544653 [patent_doc_number] => 20170098478 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-04-06 [patent_title] => 'METHOD AND APPARATUS FOR IMPROVING YIELD FOR NON-VOLATILE MEMORY' [patent_app_type] => utility [patent_app_number] => 14/873486 [patent_app_country] => US [patent_app_date] => 2015-10-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6979 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14873486 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/873486
METHOD AND APPARATUS FOR IMPROVING YIELD FOR NON-VOLATILE MEMORY Oct 1, 2015 Abandoned
Array ( [id] => 12213677 [patent_doc_number] => 09910482 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-03-06 [patent_title] => 'Memory interface with adjustable voltage and termination and methods of use' [patent_app_type] => utility [patent_app_number] => 14/863890 [patent_app_country] => US [patent_app_date] => 2015-09-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5502 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14863890 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/863890
Memory interface with adjustable voltage and termination and methods of use Sep 23, 2015 Issued
Array ( [id] => 10724110 [patent_doc_number] => 20160070258 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-03-10 [patent_title] => 'METHOD FOR INCREASING THE WORK PERFORMANCE OF A MANUFACTURING EXECUTING SYSTEM (MES) AND AN ENTERPRISE RESOURCE PLANNING SYSTEM (ERP)' [patent_app_type] => utility [patent_app_number] => 14/844487 [patent_app_country] => US [patent_app_date] => 2015-09-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3074 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14844487 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/844487
METHOD FOR INCREASING THE WORK PERFORMANCE OF A MANUFACTURING EXECUTING SYSTEM (MES) AND AN ENTERPRISE RESOURCE PLANNING SYSTEM (ERP) Sep 2, 2015 Abandoned
Array ( [id] => 14554061 [patent_doc_number] => 10345484 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-07-09 [patent_title] => Storm confirmation and path prediction system [patent_app_type] => utility [patent_app_number] => 14/842083 [patent_app_country] => US [patent_app_date] => 2015-09-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 12 [patent_no_of_words] => 6958 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 290 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14842083 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/842083
Storm confirmation and path prediction system Aug 31, 2015 Issued
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