Patricia L Morris
Examiner (ID: 15529, Phone: (571)272-0688 , Office: P/1625 )
Most Active Art Unit | 1625 |
Art Unit(s) | 1203, 1201, 1612, 1209, 1625 |
Total Applications | 3798 |
Issued Applications | 2688 |
Pending Applications | 142 |
Abandoned Applications | 966 |
Applications
Application number | Title of the application | Filing Date | Status |
---|---|---|---|
Array
(
[id] => 11644877
[patent_doc_number] => 09666265
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[patent_issue_date] => 2017-05-30
[patent_title] => 'Semiconductor device'
[patent_app_type] => utility
[patent_app_number] => 14/967006
[patent_app_country] => US
[patent_app_date] => 2015-12-11
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Array
(
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[patent_doc_number] => 09711232
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[patent_issue_date] => 2017-07-18
[patent_title] => 'Dynamic non-volatile memory operation scheduling for controlling power consumption of solid-state drives'
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Array
(
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[patent_title] => 'Three dimensional memory device'
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Array
(
[id] => 11599516
[patent_doc_number] => 09646692
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[patent_issue_date] => 2017-05-09
[patent_title] => 'Programming verify for nonvolatile memory'
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Array
(
[id] => 11417371
[patent_doc_number] => 09564204
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Array
(
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[patent_doc_number] => 10459472
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[patent_issue_date] => 2019-10-29
[patent_title] => Model predictive control optimization for power electronics
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Array
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[patent_doc_number] => 20170161460
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[patent_title] => 'Application Development System for Medical Pumps'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/959622 | Application development system for medical pumps | Dec 3, 2015 | Issued |
Array
(
[id] => 11466536
[patent_doc_number] => 09583175
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2017-02-28
[patent_title] => 'Receiver equalization circuit with cross coupled transistors and/or RC impedance'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/956870 | Receiver equalization circuit with cross coupled transistors and/or RC impedance | Dec 1, 2015 | Issued |
Array
(
[id] => 11966852
[patent_doc_number] => 20170271005
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-09-21
[patent_title] => 'READING CIRCUIT FOR RESISTIVE MEMORY'
[patent_app_type] => utility
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/531782 | Reading circuit for resistive memory | Nov 30, 2015 | Issued |
Array
(
[id] => 11265724
[patent_doc_number] => 09490024
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[patent_kind] => B1
[patent_issue_date] => 2016-11-08
[patent_title] => 'Solid state storage device and reading control method thereof'
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Array
(
[id] => 10732775
[patent_doc_number] => 20160078926
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-03-17
[patent_title] => 'DUAL-PORT STATIC RANDOM ACCESS MEMORY (SRAM)'
[patent_app_type] => utility
[patent_app_number] => 14/948196
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/948196 | Dual-port static random access memory (SRAM) | Nov 19, 2015 | Issued |
Array
(
[id] => 11233821
[patent_doc_number] => 09461056
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[patent_title] => 'Non-volatile memory and semiconductor device'
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Array
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Array
(
[id] => 15608141
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Array
(
[id] => 11293907
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Array
(
[id] => 11753187
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Array
(
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Array
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Array
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