Search

Patricia L Morris

Examiner (ID: 15529, Phone: (571)272-0688 , Office: P/1625 )

Most Active Art Unit
1625
Art Unit(s)
1203, 1201, 1612, 1209, 1625
Total Applications
3798
Issued Applications
2688
Pending Applications
142
Abandoned Applications
966

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 10336382 [patent_doc_number] => 20150221388 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-08-06 [patent_title] => 'ABRIDGED ERASE VERIFY METHOD FOR FLASH MEMORY' [patent_app_type] => utility [patent_app_number] => 14/174764 [patent_app_country] => US [patent_app_date] => 2014-02-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6697 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14174764 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/174764
ABRIDGED ERASE VERIFY METHOD FOR FLASH MEMORY Feb 5, 2014 Abandoned
Array ( [id] => 10165148 [patent_doc_number] => 09196376 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-11-24 [patent_title] => 'Semiconductor devices and semiconductor systems including the same' [patent_app_type] => utility [patent_app_number] => 14/174744 [patent_app_country] => US [patent_app_date] => 2014-02-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3756 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14174744 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/174744
Semiconductor devices and semiconductor systems including the same Feb 5, 2014 Issued
Array ( [id] => 10336341 [patent_doc_number] => 20150221346 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-08-06 [patent_title] => 'AREA EFFICIENT MULTIPORT BITCELL' [patent_app_type] => utility [patent_app_number] => 14/173788 [patent_app_country] => US [patent_app_date] => 2014-02-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4114 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14173788 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/173788
AREA EFFICIENT MULTIPORT BITCELL Feb 4, 2014 Abandoned
Array ( [id] => 9508764 [patent_doc_number] => 20140145255 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-05-29 [patent_title] => 'NON-VOLATILE MEMORY DEVICES INCLUDING VERTICAL NAND CHANNELS AND METHODS OF FORMING THE SAME' [patent_app_type] => utility [patent_app_number] => 14/171074 [patent_app_country] => US [patent_app_date] => 2014-02-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 49 [patent_figures_cnt] => 49 [patent_no_of_words] => 7529 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14171074 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/171074
Non-volatile memory devices including vertical NAND channels and methods of forming the same Feb 2, 2014 Issued
Array ( [id] => 10328880 [patent_doc_number] => 20150213884 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-07-30 [patent_title] => 'PARTITIONED RESISTIVE MEMORY ARRAY' [patent_app_type] => utility [patent_app_number] => 14/168416 [patent_app_country] => US [patent_app_date] => 2014-01-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 7828 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14168416 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/168416
PARTITIONED RESISTIVE MEMORY ARRAY Jan 29, 2014 Abandoned
Array ( [id] => 10328854 [patent_doc_number] => 20150213858 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-07-30 [patent_title] => 'READING DATA FROM A MEMORY CELL' [patent_app_type] => utility [patent_app_number] => 14/163277 [patent_app_country] => US [patent_app_date] => 2014-01-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5581 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14163277 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/163277
Reading data from a memory cell Jan 23, 2014 Issued
Array ( [id] => 10470270 [patent_doc_number] => 20150355286 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-12-10 [patent_title] => 'SYSTEM FOR ESTIMATING FAILURE IN CELL MODULE' [patent_app_type] => utility [patent_app_number] => 14/761021 [patent_app_country] => US [patent_app_date] => 2014-01-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6570 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14761021 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/761021
SYSTEM FOR ESTIMATING FAILURE IN CELL MODULE Jan 15, 2014 Abandoned
Array ( [id] => 10309191 [patent_doc_number] => 20150194192 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-07-09 [patent_title] => 'SENSE AMPLIFIER OF A MEMORY CELL' [patent_app_type] => utility [patent_app_number] => 14/149353 [patent_app_country] => US [patent_app_date] => 2014-01-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3261 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14149353 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/149353
Sense amplifier of a memory cell Jan 6, 2014 Issued
Array ( [id] => 10218600 [patent_doc_number] => 20150103593 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-04-16 [patent_title] => 'Method of Writing Data in Non-Volatile Memory and Non-Volatile Storage Device Using the Same' [patent_app_type] => utility [patent_app_number] => 14/142927 [patent_app_country] => US [patent_app_date] => 2013-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3699 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14142927 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/142927
Method of Writing Data in Non-Volatile Memory and Non-Volatile Storage Device Using the Same Dec 29, 2013 Abandoned
Array ( [id] => 10645076 [patent_doc_number] => 09361949 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-06-07 [patent_title] => 'Semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 14/139998 [patent_app_country] => US [patent_app_date] => 2013-12-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 17 [patent_no_of_words] => 9066 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14139998 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/139998
Semiconductor memory device Dec 23, 2013 Issued
Array ( [id] => 9915780 [patent_doc_number] => 20150070986 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-03-12 [patent_title] => 'NONVOLATILE SEMICONDUCTOR MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 14/138314 [patent_app_country] => US [patent_app_date] => 2013-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 11292 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14138314 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/138314
Nonvolatile semiconductor memory device Dec 22, 2013 Issued
Array ( [id] => 9601914 [patent_doc_number] => 20140198596 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-07-17 [patent_title] => 'CIRCUIT FOR CONTROLLING SENSE AMPLIFIER SOURCE NODE IN SEMICONDUCTOR MEMORY DEVICE AND CONTROLLING METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 14/139736 [patent_app_country] => US [patent_app_date] => 2013-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 6966 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14139736 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/139736
Circuit for controlling sense amplifier source node in semiconductor memory device and controlling method thereof Dec 22, 2013 Issued
Array ( [id] => 9559634 [patent_doc_number] => 20140177345 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-06-26 [patent_title] => 'SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 14/139248 [patent_app_country] => US [patent_app_date] => 2013-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 33 [patent_figures_cnt] => 33 [patent_no_of_words] => 27061 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14139248 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/139248
Semiconductor device Dec 22, 2013 Issued
Array ( [id] => 9633471 [patent_doc_number] => 20140211579 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-07-31 [patent_title] => 'APPARATUS, METHOD AND SYSTEM TO DETERMINE MEMORY ACCESS COMMAND TIMING BASED ON ERROR DETECTION' [patent_app_type] => utility [patent_app_number] => 14/139558 [patent_app_country] => US [patent_app_date] => 2013-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 9073 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14139558 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/139558
Apparatus, method and system to determine memory access command timing based on error detection Dec 22, 2013 Issued
Array ( [id] => 10590396 [patent_doc_number] => 09312016 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-04-12 [patent_title] => 'Multi-level cell memory device and method of operating multi-level cell memory device' [patent_app_type] => utility [patent_app_number] => 14/135734 [patent_app_country] => US [patent_app_date] => 2013-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 22 [patent_no_of_words] => 12982 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 196 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14135734 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/135734
Multi-level cell memory device and method of operating multi-level cell memory device Dec 19, 2013 Issued
Array ( [id] => 9420283 [patent_doc_number] => 20140104933 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-04-17 [patent_title] => 'SEMICONDUCTOR MEMORY' [patent_app_type] => utility [patent_app_number] => 14/134964 [patent_app_country] => US [patent_app_date] => 2013-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 10406 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14134964 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/134964
SEMICONDUCTOR MEMORY Dec 18, 2013 Abandoned
Array ( [id] => 10200576 [patent_doc_number] => 20150085563 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-03-26 [patent_title] => 'MEMORY AND MEMORY SYSTEM INCLUDING THE SAME' [patent_app_type] => utility [patent_app_number] => 14/134930 [patent_app_country] => US [patent_app_date] => 2013-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 10050 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14134930 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/134930
MEMORY AND MEMORY SYSTEM INCLUDING THE SAME Dec 18, 2013 Abandoned
Array ( [id] => 10144839 [patent_doc_number] => 09177651 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-11-03 [patent_title] => 'Programming methods and memories' [patent_app_type] => utility [patent_app_number] => 14/108822 [patent_app_country] => US [patent_app_date] => 2013-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5706 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14108822 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/108822
Programming methods and memories Dec 16, 2013 Issued
Array ( [id] => 10144839 [patent_doc_number] => 09177651 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-11-03 [patent_title] => 'Programming methods and memories' [patent_app_type] => utility [patent_app_number] => 14/108822 [patent_app_country] => US [patent_app_date] => 2013-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5706 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14108822 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/108822
Programming methods and memories Dec 16, 2013 Issued
Array ( [id] => 10144839 [patent_doc_number] => 09177651 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-11-03 [patent_title] => 'Programming methods and memories' [patent_app_type] => utility [patent_app_number] => 14/108822 [patent_app_country] => US [patent_app_date] => 2013-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5706 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14108822 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/108822
Programming methods and memories Dec 16, 2013 Issued
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