Search

Patricia L Morris

Examiner (ID: 15529, Phone: (571)272-0688 , Office: P/1625 )

Most Active Art Unit
1625
Art Unit(s)
1203, 1201, 1612, 1209, 1625
Total Applications
3798
Issued Applications
2688
Pending Applications
142
Abandoned Applications
966

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 10178642 [patent_doc_number] => 09208853 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-12-08 [patent_title] => 'Dual-port static random access memory (SRAM)' [patent_app_type] => utility [patent_app_number] => 13/842086 [patent_app_country] => US [patent_app_date] => 2013-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 4782 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13842086 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/842086
Dual-port static random access memory (SRAM) Mar 14, 2013 Issued
Array ( [id] => 9733317 [patent_doc_number] => 20140269026 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-09-18 [patent_title] => 'TRACKING CIRCUIT' [patent_app_type] => utility [patent_app_number] => 13/840668 [patent_app_country] => US [patent_app_date] => 2013-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 8268 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13840668 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/840668
Tracking circuit Mar 14, 2013 Issued
Array ( [id] => 9106112 [patent_doc_number] => 20130279244 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-10-24 [patent_title] => 'HIERARCHICAL MEMORY MAGNETORESISTIVE RANDOM-ACCESS MEMORY (MRAM) ARCHITECTURE' [patent_app_type] => utility [patent_app_number] => 13/842122 [patent_app_country] => US [patent_app_date] => 2013-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 13811 [patent_no_of_claims] => 39 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13842122 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/842122
Hierarchical memory magnetoresistive random-access memory (MRAM) architecture Mar 14, 2013 Issued
Array ( [id] => 10112030 [patent_doc_number] => 09147447 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-09-29 [patent_title] => 'Ground-referenced single-ended memory interconnect' [patent_app_type] => utility [patent_app_number] => 13/844570 [patent_app_country] => US [patent_app_date] => 2013-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 18 [patent_no_of_words] => 8417 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13844570 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/844570
Ground-referenced single-ended memory interconnect Mar 14, 2013 Issued
Array ( [id] => 9119830 [patent_doc_number] => 20130286752 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-10-31 [patent_title] => 'SEMICONDUCTOR MEMORY' [patent_app_type] => utility [patent_app_number] => 13/840024 [patent_app_country] => US [patent_app_date] => 2013-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 17297 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13840024 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/840024
SEMICONDUCTOR MEMORY Mar 14, 2013 Abandoned
Array ( [id] => 9559625 [patent_doc_number] => 20140177336 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-06-26 [patent_title] => 'NON-VOLATILE MEMORY DEVICE AND METHOD OF FABRICATING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/843846 [patent_app_country] => US [patent_app_date] => 2013-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 10537 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13843846 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/843846
Non-volatile memory device and method of fabricating the same Mar 14, 2013 Issued
Array ( [id] => 8882580 [patent_doc_number] => 20130155764 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-06-20 [patent_title] => 'MAGNETORESISTANCE ELEMENT AND SEMICONDUCTOR MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 13/766460 [patent_app_country] => US [patent_app_date] => 2013-02-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 46 [patent_figures_cnt] => 46 [patent_no_of_words] => 15980 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13766460 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/766460
Magnetoresistance element and semiconductor memory device Feb 12, 2013 Issued
Array ( [id] => 8882566 [patent_doc_number] => 20130155750 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-06-20 [patent_title] => 'SEMICONDUCTOR STORAGE DEVICE' [patent_app_type] => utility [patent_app_number] => 13/765174 [patent_app_country] => US [patent_app_date] => 2013-02-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 13904 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13765174 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/765174
Semiconductor storage device Feb 11, 2013 Issued
Array ( [id] => 15756273 [patent_doc_number] => 10620240 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-04-14 [patent_title] => Monitoring load operation [patent_app_type] => utility [patent_app_number] => 14/761130 [patent_app_country] => US [patent_app_date] => 2013-01-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 6872 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 210 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14761130 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/761130
Monitoring load operation Jan 17, 2013 Issued
Array ( [id] => 9559642 [patent_doc_number] => 20140177354 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-06-26 [patent_title] => 'ZERO KEEPER CIRCUIT WITH FULL DESIGN-FOR-TEST COVERAGE' [patent_app_type] => utility [patent_app_number] => 13/725784 [patent_app_country] => US [patent_app_date] => 2012-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4452 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13725784 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/725784
Zero keeper circuit with full design-for-test coverage Dec 20, 2012 Issued
Array ( [id] => 10563283 [patent_doc_number] => 09286964 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-03-15 [patent_title] => 'Method, apparatus and system for responding to a row hammer event' [patent_app_type] => utility [patent_app_number] => 13/725800 [patent_app_country] => US [patent_app_date] => 2012-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 10107 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 177 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13725800 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/725800
Method, apparatus and system for responding to a row hammer event Dec 20, 2012 Issued
Array ( [id] => 9559633 [patent_doc_number] => 20140177346 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-06-26 [patent_title] => 'APPARATUS TO SUPPRESS CONCURRENT READ AND WRITE WORD LINE ACCESS OF THE SAME MEMORY ELEMENT IN A MEMORY ARRAY' [patent_app_type] => utility [patent_app_number] => 13/725180 [patent_app_country] => US [patent_app_date] => 2012-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4514 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13725180 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/725180
Apparatus to suppress concurrent read and write word line access of the same memory element in a memory array Dec 20, 2012 Issued
Array ( [id] => 10118783 [patent_doc_number] => 09153672 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-10-06 [patent_title] => 'Vertical BJT for high density memory' [patent_app_type] => utility [patent_app_number] => 13/723762 [patent_app_country] => US [patent_app_date] => 2012-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 15 [patent_no_of_words] => 3604 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13723762 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/723762
Vertical BJT for high density memory Dec 20, 2012 Issued
Array ( [id] => 8962171 [patent_doc_number] => 20130201773 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-08-08 [patent_title] => 'NONVOLATILE MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 13/724536 [patent_app_country] => US [patent_app_date] => 2012-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 11312 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13724536 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/724536
Nonvolatile memory device Dec 20, 2012 Issued
Array ( [id] => 10003883 [patent_doc_number] => 09047981 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-06-02 [patent_title] => 'Bit-flipping in memories' [patent_app_type] => utility [patent_app_number] => 13/724924 [patent_app_country] => US [patent_app_date] => 2012-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3071 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13724924 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/724924
Bit-flipping in memories Dec 20, 2012 Issued
Array ( [id] => 8890145 [patent_doc_number] => 20130163329 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-06-27 [patent_title] => 'MEMORY SYSTEM' [patent_app_type] => utility [patent_app_number] => 13/724898 [patent_app_country] => US [patent_app_date] => 2012-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 11307 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13724898 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/724898
MEMORY SYSTEM Dec 20, 2012 Abandoned
Array ( [id] => 9559622 [patent_doc_number] => 20140177334 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-06-26 [patent_title] => 'CIRCUIT FOR SENSING MLC FLASH MEMORY' [patent_app_type] => utility [patent_app_number] => 13/725648 [patent_app_country] => US [patent_app_date] => 2012-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 5971 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13725648 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/725648
Circuit for sensing MLC flash memory Dec 20, 2012 Issued
Array ( [id] => 10899860 [patent_doc_number] => 08923089 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-12-30 [patent_title] => 'Single-port read multiple-port write storage device using single-port memory cells' [patent_app_type] => utility [patent_app_number] => 13/725028 [patent_app_country] => US [patent_app_date] => 2012-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 11 [patent_no_of_words] => 10350 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 258 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13725028 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/725028
Single-port read multiple-port write storage device using single-port memory cells Dec 20, 2012 Issued
Array ( [id] => 10889432 [patent_doc_number] => 08913434 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-12-16 [patent_title] => 'Non-volatile memory device and method for driving the same' [patent_app_type] => utility [patent_app_number] => 13/722922 [patent_app_country] => US [patent_app_date] => 2012-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 9003 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 180 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13722922 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/722922
Non-volatile memory device and method for driving the same Dec 19, 2012 Issued
Array ( [id] => 10899806 [patent_doc_number] => 08923035 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-12-30 [patent_title] => 'Junctionless semiconductor device having buried gate, apparatus including the same, and method for manufacturing the semiconductor device' [patent_app_type] => utility [patent_app_number] => 13/722504 [patent_app_country] => US [patent_app_date] => 2012-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 14 [patent_no_of_words] => 6914 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13722504 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/722504
Junctionless semiconductor device having buried gate, apparatus including the same, and method for manufacturing the semiconductor device Dec 19, 2012 Issued
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