Search

Patrick C. Chen

Examiner (ID: 16543, Phone: (571)270-7207 , Office: P/2842 )

Most Active Art Unit
2842
Art Unit(s)
2816, 2842
Total Applications
665
Issued Applications
516
Pending Applications
83
Abandoned Applications
98

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 16529529 [patent_doc_number] => 20200403610 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-12-24 [patent_title] => SERIAL IGBT VOLTAGE EQUALIZATION METHOD AND SYSTEM BASED ON AUXILIARY VOLTAGE SOURCE [patent_app_type] => utility [patent_app_number] => 16/709939 [patent_app_country] => US [patent_app_date] => 2019-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2601 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16709939 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/709939
Serial IGBT voltage equalization method and system based on auxiliary voltage source Dec 10, 2019 Issued
Array ( [id] => 19508392 [patent_doc_number] => 12119825 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-10-15 [patent_title] => Frequency multiplier with balun function [patent_app_type] => utility [patent_app_number] => 17/780618 [patent_app_country] => US [patent_app_date] => 2019-12-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 12 [patent_no_of_words] => 3664 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 346 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17780618 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/780618
Frequency multiplier with balun function Dec 9, 2019 Issued
Array ( [id] => 16022605 [patent_doc_number] => 20200186146 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-06-11 [patent_title] => SAMPLING CIRCUIT AND SAMPLING METHOD [patent_app_type] => utility [patent_app_number] => 16/708876 [patent_app_country] => US [patent_app_date] => 2019-12-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5343 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16708876 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/708876
SAMPLING CIRCUIT AND SAMPLING METHOD Dec 9, 2019 Abandoned
Array ( [id] => 18106081 [patent_doc_number] => 11545987 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2023-01-03 [patent_title] => Traversing a variable delay line in a deterministic number of clock cycles [patent_app_type] => utility [patent_app_number] => 16/709367 [patent_app_country] => US [patent_app_date] => 2019-12-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3817 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 195 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16709367 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/709367
Traversing a variable delay line in a deterministic number of clock cycles Dec 9, 2019 Issued
Array ( [id] => 16802573 [patent_doc_number] => 10997522 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-05-04 [patent_title] => Suppressing/transforming leakage errors in hyperfine qubits [patent_app_type] => utility [patent_app_number] => 16/709290 [patent_app_country] => US [patent_app_date] => 2019-12-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 12 [patent_no_of_words] => 10151 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 168 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16709290 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/709290
Suppressing/transforming leakage errors in hyperfine qubits Dec 9, 2019 Issued
Array ( [id] => 17863453 [patent_doc_number] => 11444618 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-09-13 [patent_title] => High-side switch and low-side switch loss equalization in a multiphase switching converter [patent_app_type] => utility [patent_app_number] => 16/707160 [patent_app_country] => US [patent_app_date] => 2019-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 17 [patent_no_of_words] => 8633 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 176 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16707160 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/707160
High-side switch and low-side switch loss equalization in a multiphase switching converter Dec 8, 2019 Issued
Array ( [id] => 19277890 [patent_doc_number] => 12028024 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-07-02 [patent_title] => System and method of mitigating interference caused by coupling from power amplifier to voltage-controlled oscillator [patent_app_type] => utility [patent_app_number] => 16/705868 [patent_app_country] => US [patent_app_date] => 2019-12-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 13 [patent_no_of_words] => 9054 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 206 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16705868 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/705868
System and method of mitigating interference caused by coupling from power amplifier to voltage-controlled oscillator Dec 5, 2019 Issued
Array ( [id] => 16100347 [patent_doc_number] => 20200204160 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-06-25 [patent_title] => DUAL-BAND IN-PHASE AND QUADRATURE-PHASE (I/Q) SIGNAL GENERATING APPARATUS AND POLYPHASE PHASE-SHIFTING APPARATUS USING THE SAME [patent_app_type] => utility [patent_app_number] => 16/692944 [patent_app_country] => US [patent_app_date] => 2019-11-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5408 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16692944 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/692944
DUAL-BAND IN-PHASE AND QUADRATURE-PHASE (I/Q) SIGNAL GENERATING APPARATUS AND POLYPHASE PHASE-SHIFTING APPARATUS USING THE SAME Nov 21, 2019 Abandoned
Array ( [id] => 17153167 [patent_doc_number] => 11146266 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-10-12 [patent_title] => Driving method and driving device using the same [patent_app_type] => utility [patent_app_number] => 16/686683 [patent_app_country] => US [patent_app_date] => 2019-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4920 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 210 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16686683 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/686683
Driving method and driving device using the same Nov 17, 2019 Issued
Array ( [id] => 17862063 [patent_doc_number] => 11443222 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-09-13 [patent_title] => Cross-resonance fan-out for efficiency and hardware reduction [patent_app_type] => utility [patent_app_number] => 16/666553 [patent_app_country] => US [patent_app_date] => 2019-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5636 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16666553 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/666553
Cross-resonance fan-out for efficiency and hardware reduction Oct 28, 2019 Issued
Array ( [id] => 15533861 [patent_doc_number] => 20200059236 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-02-20 [patent_title] => GRAY CODE COUNTER [patent_app_type] => utility [patent_app_number] => 16/662195 [patent_app_country] => US [patent_app_date] => 2019-10-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5127 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16662195 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/662195
Gray code counter Oct 23, 2019 Issued
Array ( [id] => 15777403 [patent_doc_number] => 20200119719 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-16 [patent_title] => Positive Logic Digitally Tunable Capacitor [patent_app_type] => utility [patent_app_number] => 16/653728 [patent_app_country] => US [patent_app_date] => 2019-10-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5219 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16653728 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/653728
Positive logic digitally tunable capacitor Oct 14, 2019 Issued
Array ( [id] => 15689255 [patent_doc_number] => 20200099291 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-03-26 [patent_title] => CHARGE PUMPS WITH ACCURATE OUTPUT CURRENT LIMITING [patent_app_type] => utility [patent_app_number] => 16/577146 [patent_app_country] => US [patent_app_date] => 2019-09-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5833 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16577146 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/577146
Charge pumps with accurate output current limiting Sep 19, 2019 Issued
Array ( [id] => 16273253 [patent_doc_number] => 20200274741 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-08-27 [patent_title] => SIGNAL RECEIVER CIRCUIT, AND SEMICONDUCTOR APPARATUS AND SEMICONDUCTOR SYSTEM INCLUDING THE SIGNAL RECEIVER CIRCUIT [patent_app_type] => utility [patent_app_number] => 16/572154 [patent_app_country] => US [patent_app_date] => 2019-09-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7037 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16572154 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/572154
Signal receiver circuit, and semiconductor apparatus and semiconductor system including the signal receiver circuit Sep 15, 2019 Issued
Array ( [id] => 16713846 [patent_doc_number] => 20210080993 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-03-18 [patent_title] => CONFIGURABLE CLOCK BUFFER FOR MULTIPLE OPERATING MODES [patent_app_type] => utility [patent_app_number] => 16/569991 [patent_app_country] => US [patent_app_date] => 2019-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5106 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16569991 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/569991
Configurable clock buffer for multiple operating modes Sep 12, 2019 Issued
Array ( [id] => 16339867 [patent_doc_number] => 10790839 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-09-29 [patent_title] => Device for adjusting the locking of an injection locked frequency multiplier [patent_app_type] => utility [patent_app_number] => 16/570549 [patent_app_country] => US [patent_app_date] => 2019-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 7417 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16570549 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/570549
Device for adjusting the locking of an injection locked frequency multiplier Sep 12, 2019 Issued
Array ( [id] => 16976336 [patent_doc_number] => 20210220573 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-07-22 [patent_title] => INFORMATION CARRIER READER ASSEMBLY [patent_app_type] => utility [patent_app_number] => 15/734289 [patent_app_country] => US [patent_app_date] => 2019-09-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3016 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15734289 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/734289
Information carrier reader assembly Sep 11, 2019 Issued
Array ( [id] => 16896935 [patent_doc_number] => 11038500 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-06-15 [patent_title] => Gate resistance adjustment device [patent_app_type] => utility [patent_app_number] => 16/564580 [patent_app_country] => US [patent_app_date] => 2019-09-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 6443 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16564580 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/564580
Gate resistance adjustment device Sep 8, 2019 Issued
Array ( [id] => 16257325 [patent_doc_number] => 20200266700 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-08-20 [patent_title] => DYNAMIC SIGNAL SLOPE COMPENSATION [patent_app_type] => utility [patent_app_number] => 16/560149 [patent_app_country] => US [patent_app_date] => 2019-09-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6945 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16560149 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/560149
Dynamic signal slope compensation Sep 3, 2019 Issued
Array ( [id] => 16164613 [patent_doc_number] => 20200220539 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-07-09 [patent_title] => GATE CONTROL CIRCUIT AND TRANSISTOR DRIVE CIRCUIT [patent_app_type] => utility [patent_app_number] => 16/559106 [patent_app_country] => US [patent_app_date] => 2019-09-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5802 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 194 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16559106 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/559106
Gate control circuit and transistor drive circuit Sep 2, 2019 Issued
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