Search

Patrick C. Chen

Examiner (ID: 1056)

Most Active Art Unit
2842
Art Unit(s)
2836, 2816, 2842
Total Applications
707
Issued Applications
540
Pending Applications
80
Abandoned Applications
100

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 13379357 [patent_doc_number] => 20180241220 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-08-23 [patent_title] => WIRELESS POWER TRANSFER SYSTEMS FOR SURFACES [patent_app_type] => utility [patent_app_number] => 15/956791 [patent_app_country] => US [patent_app_date] => 2018-04-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13714 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => 0 [patent_words_short_claim] => 217 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15956791 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/956791
WIRELESS POWER TRANSFER SYSTEMS FOR SURFACES Apr 18, 2018 Abandoned
Array ( [id] => 13379359 [patent_doc_number] => 20180241221 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-08-23 [patent_title] => WIRELESS POWER TRANSFER SYSTEMS FOR SURFACES [patent_app_type] => utility [patent_app_number] => 15/956797 [patent_app_country] => US [patent_app_date] => 2018-04-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13705 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => 0 [patent_words_short_claim] => 217 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15956797 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/956797
Wireless power transfer systems for surfaces Apr 18, 2018 Issued
Array ( [id] => 13379717 [patent_doc_number] => 20180241400 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-08-23 [patent_title] => GRAY CODE COUNTER [patent_app_type] => utility [patent_app_number] => 15/956792 [patent_app_country] => US [patent_app_date] => 2018-04-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5106 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15956792 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/956792
Gray code counter Apr 18, 2018 Issued
Array ( [id] => 13379683 [patent_doc_number] => 20180241383 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-08-23 [patent_title] => APPARATUSES AND METHODS FOR DUTY CYCLE ADJUSTMENT [patent_app_type] => utility [patent_app_number] => 15/956601 [patent_app_country] => US [patent_app_date] => 2018-04-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7398 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15956601 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/956601
Apparatuses and methods for duty cycle adjustment Apr 17, 2018 Issued
Array ( [id] => 15489209 [patent_doc_number] => 10559972 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-02-11 [patent_title] => Two-tier battery solution for data center backup [patent_app_type] => utility [patent_app_number] => 15/950852 [patent_app_country] => US [patent_app_date] => 2018-04-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4306 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 232 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15950852 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/950852
Two-tier battery solution for data center backup Apr 10, 2018 Issued
Array ( [id] => 16874302 [patent_doc_number] => 20210167769 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-06-03 [patent_title] => CIRCUIT ARRANGEMENT AND POWER CONVERTER MODULE HAVING SEMICONDUCTOR SWITCHES CONNECTED IN SERIES [patent_app_type] => utility [patent_app_number] => 17/045232 [patent_app_country] => US [patent_app_date] => 2018-04-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2550 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17045232 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/045232
Circuit arrangement and power converter module having semiconductor switches connected in series Apr 2, 2018 Issued
Array ( [id] => 14940269 [patent_doc_number] => 20190305773 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-10-03 [patent_title] => POWER GATING FOR MULTIPLE BACKSIDE VOLTAGE PLANES [patent_app_type] => utility [patent_app_number] => 15/943530 [patent_app_country] => US [patent_app_date] => 2018-04-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12085 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15943530 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/943530
Power gating for multiple backside voltage planes Apr 1, 2018 Issued
Array ( [id] => 14739645 [patent_doc_number] => 10389238 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-08-20 [patent_title] => Charge pumps and methods of operating charge pumps [patent_app_type] => utility [patent_app_number] => 15/927150 [patent_app_country] => US [patent_app_date] => 2018-03-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3071 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15927150 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/927150
Charge pumps and methods of operating charge pumps Mar 20, 2018 Issued
Array ( [id] => 13392779 [patent_doc_number] => 20180247932 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-08-30 [patent_title] => VOLTAGE BALANCED STACKED CLAMP [patent_app_type] => utility [patent_app_number] => 15/904488 [patent_app_country] => US [patent_app_date] => 2018-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8765 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => 0 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15904488 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/904488
VOLTAGE BALANCED STACKED CLAMP Feb 25, 2018 Abandoned
Array ( [id] => 13392777 [patent_doc_number] => 20180247931 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-08-30 [patent_title] => VOLTAGE BALANCED STACKED CLAMP [patent_app_type] => utility [patent_app_number] => 15/898828 [patent_app_country] => US [patent_app_date] => 2018-02-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8747 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => 0 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15898828 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/898828
VOLTAGE BALANCED STACKED CLAMP Feb 18, 2018 Abandoned
Array ( [id] => 17284571 [patent_doc_number] => 11201619 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-12-14 [patent_title] => Isolated high side drive circuit [patent_app_type] => utility [patent_app_number] => 16/483570 [patent_app_country] => US [patent_app_date] => 2018-02-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 21 [patent_no_of_words] => 13929 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 329 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16483570 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/483570
Isolated high side drive circuit Feb 6, 2018 Issued
Array ( [id] => 12874786 [patent_doc_number] => 20180183437 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-06-28 [patent_title] => BOOTSTRAP DIODE CIRCUITS [patent_app_type] => utility [patent_app_number] => 15/879231 [patent_app_country] => US [patent_app_date] => 2018-01-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9864 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15879231 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/879231
Bootstrap diode circuits Jan 23, 2018 Issued
Array ( [id] => 12803023 [patent_doc_number] => 20180159511 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-06-07 [patent_title] => Positive Logic Digitally Tunable Capacitor [patent_app_type] => utility [patent_app_number] => 15/871643 [patent_app_country] => US [patent_app_date] => 2018-01-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5160 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15871643 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/871643
Positive logic digitally tunable capacitor Jan 14, 2018 Issued
Array ( [id] => 15047027 [patent_doc_number] => 20190334518 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-10-31 [patent_title] => UNIVERSAL SEMICONDUCTOR SWITCH [patent_app_type] => utility [patent_app_number] => 16/475144 [patent_app_country] => US [patent_app_date] => 2017-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2004 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 37 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16475144 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/475144
UNIVERSAL SEMICONDUCTOR SWITCH Dec 14, 2017 Abandoned
Array ( [id] => 14239589 [patent_doc_number] => 20190131967 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-05-02 [patent_title] => BUS DRIVER WITH RISE/FALL TIME CONTROL [patent_app_type] => utility [patent_app_number] => 15/834599 [patent_app_country] => US [patent_app_date] => 2017-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3682 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15834599 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/834599
Bus driver with rise/fall time control Dec 6, 2017 Issued
Array ( [id] => 14415243 [patent_doc_number] => 20190173465 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-06-06 [patent_title] => CONTROLLED CURRENT MANIPULATION FOR REGENERATIVE CHARGING OF GATE CAPACITANCE [patent_app_type] => utility [patent_app_number] => 15/833857 [patent_app_country] => US [patent_app_date] => 2017-12-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6503 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 235 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15833857 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/833857
Controlled current manipulation for regenerative charging of gate capacitance Dec 5, 2017 Issued
Array ( [id] => 12803116 [patent_doc_number] => 20180159542 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-06-07 [patent_title] => HITLESS RE-ARRANGEMENTS IN COUPLED DIGITAL PHASE-LOCKED LOOPS [patent_app_type] => utility [patent_app_number] => 15/833117 [patent_app_country] => US [patent_app_date] => 2017-12-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12338 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15833117 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/833117
Hitless re-arrangements in coupled digital phase-locked loops Dec 5, 2017 Issued
Array ( [id] => 12803107 [patent_doc_number] => 20180159539 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-06-07 [patent_title] => CLOCK DIVIDING FREQUENCY CIRCUIT, CONTROL CIRCUIT AND POWER MANAGEMENT INTEGRATED CIRCUIT [patent_app_type] => utility [patent_app_number] => 15/828610 [patent_app_country] => US [patent_app_date] => 2017-12-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4761 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15828610 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/828610
Clock dividing frequency circuit, control circuit and power management integrated circuit Nov 30, 2017 Issued
Array ( [id] => 14604959 [patent_doc_number] => 10355679 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-07-16 [patent_title] => Display driving circuit, calibration module, and associated calibration method [patent_app_type] => utility [patent_app_number] => 15/828618 [patent_app_country] => US [patent_app_date] => 2017-12-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 5030 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15828618 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/828618
Display driving circuit, calibration module, and associated calibration method Nov 30, 2017 Issued
Array ( [id] => 12803029 [patent_doc_number] => 20180159513 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-06-07 [patent_title] => Retention Flip-Flop Circuits For Low Power Applications [patent_app_type] => utility [patent_app_number] => 15/826273 [patent_app_country] => US [patent_app_date] => 2017-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7629 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 303 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15826273 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/826273
Retention flip-flop circuits for low power applications Nov 28, 2017 Issued
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