Search

Patrick C. Chen

Examiner (ID: 1056)

Most Active Art Unit
2842
Art Unit(s)
2836, 2816, 2842
Total Applications
707
Issued Applications
540
Pending Applications
80
Abandoned Applications
100

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 17909202 [patent_doc_number] => 11463072 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2022-10-04 [patent_title] => Adaptive volterra compensator [patent_app_type] => utility [patent_app_number] => 15/807419 [patent_app_country] => US [patent_app_date] => 2017-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 10086 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15807419 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/807419
Adaptive volterra compensator Nov 7, 2017 Issued
Array ( [id] => 15155365 [patent_doc_number] => 20190356160 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-11-21 [patent_title] => CONTROL CIRCUIT COMPATIBLE WITH BATTERY POWER SUPPLY AND EXTERNAL POWER SUPPLY [patent_app_type] => utility [patent_app_number] => 16/476869 [patent_app_country] => US [patent_app_date] => 2017-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5408 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -4 [patent_words_short_claim] => 263 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16476869 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/476869
Control circuit compatible with battery power supply and external power supply Oct 27, 2017 Issued
Array ( [id] => 15824529 [patent_doc_number] => 10637468 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-04-28 [patent_title] => Galvanically-isolated signaling between modules with step-up transformer [patent_app_type] => utility [patent_app_number] => 15/790196 [patent_app_country] => US [patent_app_date] => 2017-10-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 14 [patent_no_of_words] => 5990 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15790196 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/790196
Galvanically-isolated signaling between modules with step-up transformer Oct 22, 2017 Issued
Array ( [id] => 12651471 [patent_doc_number] => 20180108988 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-04-19 [patent_title] => SWITCH LINEARIZATION BY COMPENSATION OF A FIELD-EFFECT TRANSISTOR [patent_app_type] => utility [patent_app_number] => 15/788789 [patent_app_country] => US [patent_app_date] => 2017-10-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12217 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15788789 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/788789
Switch linearization by compensation of a field-effect transistor Oct 18, 2017 Issued
Array ( [id] => 14741309 [patent_doc_number] => 10390075 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-08-20 [patent_title] => Semiconductor device, broadcasting system, and electronic device [patent_app_type] => utility [patent_app_number] => 15/729191 [patent_app_country] => US [patent_app_date] => 2017-10-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 51 [patent_no_of_words] => 31836 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 190 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15729191 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/729191
Semiconductor device, broadcasting system, and electronic device Oct 9, 2017 Issued
Array ( [id] => 15374325 [patent_doc_number] => 10528885 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-01-07 [patent_title] => Cross-resonance fan-out for efficiency and hardware reduction [patent_app_type] => utility [patent_app_number] => 15/720927 [patent_app_country] => US [patent_app_date] => 2017-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5594 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 187 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15720927 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/720927
Cross-resonance fan-out for efficiency and hardware reduction Sep 28, 2017 Issued
Array ( [id] => 15969265 [patent_doc_number] => 20200168384 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-05-28 [patent_title] => MAGNETIC CORE INDUCTORS [patent_app_type] => utility [patent_app_number] => 16/637006 [patent_app_country] => US [patent_app_date] => 2017-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5377 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16637006 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/637006
Magnetic core inductors Sep 27, 2017 Issued
Array ( [id] => 12597957 [patent_doc_number] => 20180091149 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-03-29 [patent_title] => CIRCUIT AND METHOD FOR CHECKING THE INTEGRITY OF A CONTROL SIGNAL [patent_app_type] => utility [patent_app_number] => 15/718033 [patent_app_country] => US [patent_app_date] => 2017-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4847 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 52 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15718033 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/718033
Circuit and method for checking the integrity of a control signal Sep 27, 2017 Issued
Array ( [id] => 14111875 [patent_doc_number] => 20190097613 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-03-28 [patent_title] => METHODS AND APPARATUSES OF A TWO-PHASE FLIP-FLOP WITH SYMMETRICAL RISE AND FALL TIMES [patent_app_type] => utility [patent_app_number] => 15/717610 [patent_app_country] => US [patent_app_date] => 2017-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7861 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15717610 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/717610
Methods and apparatuses of a two-phase flip-flop with symmetrical rise and fall times Sep 26, 2017 Issued
Array ( [id] => 12155368 [patent_doc_number] => 20180026631 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-01-25 [patent_title] => 'BIASING SCHEME FOR HIGH VOLTAGE CIRCUITS USING LOW VOLTAGE DEVICES' [patent_app_type] => utility [patent_app_number] => 15/714672 [patent_app_country] => US [patent_app_date] => 2017-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 9664 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15714672 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/714672
Biasing scheme for high voltage circuits using low voltage devices Sep 24, 2017 Issued
Array ( [id] => 12436677 [patent_doc_number] => 09978743 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2018-05-22 [patent_title] => Voltage balanced stacked clamp [patent_app_type] => utility [patent_app_number] => 15/713731 [patent_app_country] => US [patent_app_date] => 2017-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 8697 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 268 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15713731 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/713731
Voltage balanced stacked clamp Sep 24, 2017 Issued
Array ( [id] => 14254035 [patent_doc_number] => 10277230 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-04-30 [patent_title] => Jitter reduction in clock and data recovery circuits [patent_app_type] => utility [patent_app_number] => 15/714719 [patent_app_country] => US [patent_app_date] => 2017-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 10529 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 213 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15714719 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/714719
Jitter reduction in clock and data recovery circuits Sep 24, 2017 Issued
Array ( [id] => 14080933 [patent_doc_number] => 20190089354 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-03-21 [patent_title] => Low Power Clock Gating Circuit [patent_app_type] => utility [patent_app_number] => 15/710406 [patent_app_country] => US [patent_app_date] => 2017-09-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7494 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15710406 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/710406
Low power clock gating circuit Sep 19, 2017 Issued
Array ( [id] => 12555903 [patent_doc_number] => 10014866 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-07-03 [patent_title] => Clock alignment scheme for data macros of DDR PHY [patent_app_type] => utility [patent_app_number] => 15/707205 [patent_app_country] => US [patent_app_date] => 2017-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 3903 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15707205 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/707205
Clock alignment scheme for data macros of DDR PHY Sep 17, 2017 Issued
Array ( [id] => 14051013 [patent_doc_number] => 20190081614 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-03-14 [patent_title] => MULTI-RADIO FRONT-END CIRCUITRY FOR RADIO FREQUENCY IMBALANCED ANTENNA SHARING SYSTEM [patent_app_type] => utility [patent_app_number] => 15/703703 [patent_app_country] => US [patent_app_date] => 2017-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6687 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15703703 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/703703
Multi-radio front-end circuitry for radio frequency imbalanced antenna sharing system Sep 12, 2017 Issued
Array ( [id] => 13240173 [patent_doc_number] => 10133284 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-11-20 [patent_title] => Circuits for setting reference voltages and semiconductor devices including the same [patent_app_type] => utility [patent_app_number] => 15/694336 [patent_app_country] => US [patent_app_date] => 2017-09-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5992 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 185 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15694336 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/694336
Circuits for setting reference voltages and semiconductor devices including the same Aug 31, 2017 Issued
Array ( [id] => 12096085 [patent_doc_number] => 20170353178 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-12-07 [patent_title] => 'Current-Controlled Active Diode' [patent_app_type] => utility [patent_app_number] => 15/684100 [patent_app_country] => US [patent_app_date] => 2017-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 9011 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15684100 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/684100
Current-controlled active diode Aug 22, 2017 Issued
Array ( [id] => 12155344 [patent_doc_number] => 20180026608 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-01-25 [patent_title] => 'Integrating Circuit and Signal Processing Module' [patent_app_type] => utility [patent_app_number] => 15/679182 [patent_app_country] => US [patent_app_date] => 2017-08-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 5426 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15679182 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/679182
Integrating Circuit and Signal Processing Module Aug 16, 2017 Abandoned
Array ( [id] => 13292891 [patent_doc_number] => 10157644 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2018-12-18 [patent_title] => Methods and apparatus for generation of voltages [patent_app_type] => utility [patent_app_number] => 15/671317 [patent_app_country] => US [patent_app_date] => 2017-08-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 12 [patent_no_of_words] => 7831 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 440 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15671317 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/671317
Methods and apparatus for generation of voltages Aug 7, 2017 Issued
Array ( [id] => 12575595 [patent_doc_number] => 10020802 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-07-10 [patent_title] => Methods and systems for operating hybrid power devices using driver circuits that perform indirect instantaneous load current sensing using stored I-V characteristics [patent_app_type] => utility [patent_app_number] => 15/634891 [patent_app_country] => US [patent_app_date] => 2017-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 24 [patent_no_of_words] => 7591 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 178 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15634891 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/634891
Methods and systems for operating hybrid power devices using driver circuits that perform indirect instantaneous load current sensing using stored I-V characteristics Jun 26, 2017 Issued
Menu