Search

Patrick C. Chen

Examiner (ID: 16543, Phone: (571)270-7207 , Office: P/2842 )

Most Active Art Unit
2842
Art Unit(s)
2816, 2842
Total Applications
665
Issued Applications
516
Pending Applications
83
Abandoned Applications
98

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 16339863 [patent_doc_number] => 10790835 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-09-29 [patent_title] => System for phase calibration of phase locked loop [patent_app_type] => utility [patent_app_number] => 16/489551 [patent_app_country] => US [patent_app_date] => 2017-03-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 6089 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 206 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16489551 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/489551
System for phase calibration of phase locked loop Feb 28, 2017 Issued
Array ( [id] => 13755013 [patent_doc_number] => 10170460 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-01-01 [patent_title] => Voltage balanced stacked clamp [patent_app_type] => utility [patent_app_number] => 15/444519 [patent_app_country] => US [patent_app_date] => 2017-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 8538 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 285 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15444519 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/444519
Voltage balanced stacked clamp Feb 27, 2017 Issued
Array ( [id] => 15377255 [patent_doc_number] => 10530360 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-01-07 [patent_title] => Double gate transistor device and method of operating [patent_app_type] => utility [patent_app_number] => 15/439706 [patent_app_country] => US [patent_app_date] => 2017-02-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 35 [patent_no_of_words] => 19709 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15439706 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/439706
Double gate transistor device and method of operating Feb 21, 2017 Issued
Array ( [id] => 13284359 [patent_doc_number] => 10153774 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2018-12-11 [patent_title] => Transconductor circuit for a fourth order PLL [patent_app_type] => utility [patent_app_number] => 15/418327 [patent_app_country] => US [patent_app_date] => 2017-01-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4077 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 204 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15418327 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/418327
Transconductor circuit for a fourth order PLL Jan 26, 2017 Issued
Array ( [id] => 12059931 [patent_doc_number] => 20170336275 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-11-23 [patent_title] => 'Pressure Transducer' [patent_app_type] => utility [patent_app_number] => 15/416721 [patent_app_country] => US [patent_app_date] => 2017-01-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 824 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15416721 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/416721
Pressure Transducer Jan 25, 2017 Abandoned
Array ( [id] => 11973061 [patent_doc_number] => 20170277215 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-09-28 [patent_title] => 'ELECTRONIC DEVICE, POWER SOURCE CIRCUIT, AND INTEGRATED CIRCUIT' [patent_app_type] => utility [patent_app_number] => 15/415407 [patent_app_country] => US [patent_app_date] => 2017-01-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 4430 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15415407 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/415407
ELECTRONIC DEVICE, POWER SOURCE CIRCUIT, AND INTEGRATED CIRCUIT Jan 24, 2017 Abandoned
Array ( [id] => 13146971 [patent_doc_number] => 10090827 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-10-02 [patent_title] => Pulsed semi-dynamic fast flip-flop with scan [patent_app_type] => utility [patent_app_number] => 15/414419 [patent_app_country] => US [patent_app_date] => 2017-01-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 4850 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 228 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15414419 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/414419
Pulsed semi-dynamic fast flip-flop with scan Jan 23, 2017 Issued
Array ( [id] => 13322105 [patent_doc_number] => 20180212590 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-07-26 [patent_title] => Glitch Mitigation in Switched Reactance Phase Shifters [patent_app_type] => utility [patent_app_number] => 15/414187 [patent_app_country] => US [patent_app_date] => 2017-01-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9929 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 50 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15414187 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/414187
Glitch Mitigation in Switched Reactance Phase Shifters Jan 23, 2017 Abandoned
Array ( [id] => 15548895 [patent_doc_number] => 10574243 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-02-25 [patent_title] => Apparatus and method for generating stable reference current [patent_app_type] => utility [patent_app_number] => 15/414518 [patent_app_country] => US [patent_app_date] => 2017-01-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 19 [patent_no_of_words] => 9484 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15414518 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/414518
Apparatus and method for generating stable reference current Jan 23, 2017 Issued
Array ( [id] => 13307693 [patent_doc_number] => 20180205383 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-07-19 [patent_title] => Digital Clock Generation and Variation Control Circuitry [patent_app_type] => utility [patent_app_number] => 15/410574 [patent_app_country] => US [patent_app_date] => 2017-01-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10217 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -27 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15410574 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/410574
Digital Clock Generation and Variation Control Circuitry Jan 18, 2017 Abandoned
Array ( [id] => 11855464 [patent_doc_number] => 20170229956 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-08-10 [patent_title] => 'Charge pump circuit and method for operating a charge pump circuit' [patent_app_type] => utility [patent_app_number] => 15/409178 [patent_app_country] => US [patent_app_date] => 2017-01-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3798 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15409178 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/409178
Charge pump circuit and method for operating a charge pump circuit Jan 17, 2017 Issued
Array ( [id] => 15284109 [patent_doc_number] => 10514717 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-12-24 [patent_title] => Compensation circuit [patent_app_type] => utility [patent_app_number] => 15/407344 [patent_app_country] => US [patent_app_date] => 2017-01-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 6753 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15407344 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/407344
Compensation circuit Jan 16, 2017 Issued
Array ( [id] => 13952063 [patent_doc_number] => 10211818 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-02-19 [patent_title] => Interpolator [patent_app_type] => utility [patent_app_number] => 15/406837 [patent_app_country] => US [patent_app_date] => 2017-01-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 11659 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 193 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15406837 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/406837
Interpolator Jan 15, 2017 Issued
Array ( [id] => 11760919 [patent_doc_number] => 20170207788 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-07-20 [patent_title] => 'FREQUENCY DIVIDER AND CONTROL METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 15/405494 [patent_app_country] => US [patent_app_date] => 2017-01-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4225 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15405494 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/405494
Frequency divider and control method thereof Jan 12, 2017 Issued
Array ( [id] => 11621544 [patent_doc_number] => 20170131731 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-05-11 [patent_title] => 'SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 15/406024 [patent_app_country] => US [patent_app_date] => 2017-01-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6337 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15406024 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/406024
Semiconductor device Jan 12, 2017 Issued
Array ( [id] => 12852088 [patent_doc_number] => 20180175869 [patent_country] => US [patent_kind] => A9 [patent_issue_date] => 2018-06-21 [patent_title] => Stacked Synthesizer For Wide Local Oscillator Generation Using A Dynamic Divider [patent_app_type] => utility [patent_app_number] => 15/402300 [patent_app_country] => US [patent_app_date] => 2017-01-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3382 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15402300 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/402300
Stacked synthesizer for wide local oscillator generation using a dynamic divider Jan 9, 2017 Issued
Array ( [id] => 13769073 [patent_doc_number] => 10176883 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-01-08 [patent_title] => Power-up sequence protection circuit for avoiding unexpected power-up voltage [patent_app_type] => utility [patent_app_number] => 15/402242 [patent_app_country] => US [patent_app_date] => 2017-01-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5335 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 246 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15402242 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/402242
Power-up sequence protection circuit for avoiding unexpected power-up voltage Jan 9, 2017 Issued
Array ( [id] => 12852088 [patent_doc_number] => 20180175869 [patent_country] => US [patent_kind] => A9 [patent_issue_date] => 2018-06-21 [patent_title] => Stacked Synthesizer For Wide Local Oscillator Generation Using A Dynamic Divider [patent_app_type] => utility [patent_app_number] => 15/402300 [patent_app_country] => US [patent_app_date] => 2017-01-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3382 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15402300 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/402300
Stacked synthesizer for wide local oscillator generation using a dynamic divider Jan 9, 2017 Issued
Array ( [id] => 14126503 [patent_doc_number] => 10250122 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-04-02 [patent_title] => Multi-phase control for pulse width modulation power converters [patent_app_type] => utility [patent_app_number] => 15/398912 [patent_app_country] => US [patent_app_date] => 2017-01-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 16 [patent_no_of_words] => 17997 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15398912 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/398912
Multi-phase control for pulse width modulation power converters Jan 4, 2017 Issued
Array ( [id] => 11745467 [patent_doc_number] => 20170199540 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-07-13 [patent_title] => 'REFERENCE VOLTAGE CIRCUIT' [patent_app_type] => utility [patent_app_number] => 15/398004 [patent_app_country] => US [patent_app_date] => 2017-01-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6097 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15398004 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/398004
Reference voltage circuit Jan 3, 2017 Issued
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