
Patrick C. Chen
Examiner (ID: 3673)
| Most Active Art Unit | 2842 |
| Art Unit(s) | 2836, 2816, 2842 |
| Total Applications | 694 |
| Issued Applications | 532 |
| Pending Applications | 78 |
| Abandoned Applications | 100 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 12336831
[patent_doc_number] => 09948281
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-04-17
[patent_title] => Positive logic digitally tunable capacitor
[patent_app_type] => utility
[patent_app_number] => 15/256453
[patent_app_country] => US
[patent_app_date] => 2016-09-02
[patent_effective_date] => 0000-00-00
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[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15256453
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/256453 | Positive logic digitally tunable capacitor | Sep 1, 2016 | Issued |
Array
(
[id] => 12316482
[patent_doc_number] => 09941884
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-04-10
[patent_title] => AC coupled level shifting circuit
[patent_app_type] => utility
[patent_app_number] => 15/253769
[patent_app_country] => US
[patent_app_date] => 2016-08-31
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/253769 | AC coupled level shifting circuit | Aug 30, 2016 | Issued |
Array
(
[id] => 13334299
[patent_doc_number] => 20180218687
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[patent_kind] => A1
[patent_issue_date] => 2018-08-02
[patent_title] => VOLTAGE CONVERTING CIRCUIT, VOLTAGE CONVERTING MTHOD, GATE DRIVING CIRCUIT, DISPLAY PANEL AND DISPLAY DEVICE
[patent_app_type] => utility
[patent_app_number] => 15/518362
[patent_app_country] => US
[patent_app_date] => 2016-07-29
[patent_effective_date] => 0000-00-00
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/518362 | VOLTAGE CONVERTING CIRCUIT, VOLTAGE CONVERTING MTHOD, GATE DRIVING CIRCUIT, DISPLAY PANEL AND DISPLAY DEVICE | Jul 28, 2016 | Abandoned |
Array
(
[id] => 11740885
[patent_doc_number] => 09705485
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[patent_kind] => B1
[patent_issue_date] => 2017-07-11
[patent_title] => 'High-resolution current and method for generating a current'
[patent_app_type] => utility
[patent_app_number] => 15/208071
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/208071 | High-resolution current and method for generating a current | Jul 11, 2016 | Issued |
Array
(
[id] => 12459234
[patent_doc_number] => 09985619
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-05-29
[patent_title] => Duty cycle corrector, semiconductor device including the same, and method of operating duty cycle corrector
[patent_app_type] => utility
[patent_app_number] => 15/206622
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/206622 | Duty cycle corrector, semiconductor device including the same, and method of operating duty cycle corrector | Jul 10, 2016 | Issued |
Array
(
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[patent_doc_number] => 09954539
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-04-24
[patent_title] => Method and apparatus for clock phase generation
[patent_app_type] => utility
[patent_app_number] => 15/206634
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/206634 | Method and apparatus for clock phase generation | Jul 10, 2016 | Issued |
Array
(
[id] => 12965989
[patent_doc_number] => 09874889
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[patent_issue_date] => 2018-01-23
[patent_title] => Voltage regulator
[patent_app_type] => utility
[patent_app_number] => 15/201046
[patent_app_country] => US
[patent_app_date] => 2016-07-01
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/201046 | Voltage regulator | Jun 30, 2016 | Issued |
Array
(
[id] => 12109621
[patent_doc_number] => 09866111
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[patent_kind] => B1
[patent_issue_date] => 2018-01-09
[patent_title] => 'Regulated charge pump circuit'
[patent_app_type] => utility
[patent_app_number] => 15/198802
[patent_app_country] => US
[patent_app_date] => 2016-06-30
[patent_effective_date] => 0000-00-00
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[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15198802
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/198802 | Regulated charge pump circuit | Jun 29, 2016 | Issued |
Array
(
[id] => 15890987
[patent_doc_number] => 10651857
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-05-12
[patent_title] => Frequency based bias voltage scaling for phase locked loops
[patent_app_type] => utility
[patent_app_number] => 15/194999
[patent_app_country] => US
[patent_app_date] => 2016-06-28
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/194999 | Frequency based bias voltage scaling for phase locked loops | Jun 27, 2016 | Issued |
Array
(
[id] => 11946543
[patent_doc_number] => 20170250694
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[patent_kind] => A1
[patent_issue_date] => 2017-08-31
[patent_title] => 'SYNCHRONIZATION CIRCUIT AND SEMICONDUCTOR APPARATUS INCLUDING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 15/193357
[patent_app_country] => US
[patent_app_date] => 2016-06-27
[patent_effective_date] => 0000-00-00
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/193357 | SYNCHRONIZATION CIRCUIT AND SEMICONDUCTOR APPARATUS INCLUDING THE SAME | Jun 26, 2016 | Abandoned |
Array
(
[id] => 13725481
[patent_doc_number] => 20170373696
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-12-28
[patent_title] => Clock Alignment Scheme for Data Macros of DDR PHY
[patent_app_type] => utility
[patent_app_number] => 15/192594
[patent_app_country] => US
[patent_app_date] => 2016-06-24
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/192594 | Clock alignment scheme for data macros of DDR PHY | Jun 23, 2016 | Issued |
Array
(
[id] => 13307677
[patent_doc_number] => 20180205375
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2018-07-19
[patent_title] => CIRCUIT ARRANGEMENT FOR A SECURE DIGITAL SWITCHED OUTPUT, TEST METHOD FOR AND OUTPUT MODULE FOR THE SAME
[patent_app_type] => utility
[patent_app_number] => 15/736391
[patent_app_country] => US
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/736391 | CIRCUIT ARRANGEMENT FOR A SECURE DIGITAL SWITCHED OUTPUT, TEST METHOD FOR AND OUTPUT MODULE FOR THE SAME | Jun 23, 2016 | Abandoned |
Array
(
[id] => 11725928
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[patent_title] => 'Phase locked loop frequency calibration circuit and method'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/191457 | Phase locked loop frequency calibration circuit and method | Jun 22, 2016 | Issued |
Array
(
[id] => 11552305
[patent_doc_number] => 09621172
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2017-04-11
[patent_title] => 'Phase-locked loop circuit and calibrating method thereof'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/189445 | Phase-locked loop circuit and calibrating method thereof | Jun 21, 2016 | Issued |
Array
(
[id] => 11658821
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[patent_country] => US
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[patent_issue_date] => 2017-06-06
[patent_title] => 'Accumulator-based phase memory'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/187895 | Accumulator-based phase memory | Jun 20, 2016 | Issued |
Array
(
[id] => 12316500
[patent_doc_number] => 09941890
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-04-10
[patent_title] => Phase-locked loops with electrical overstress protection circuitry
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/187534 | Phase-locked loops with electrical overstress protection circuitry | Jun 19, 2016 | Issued |
Array
(
[id] => 11723157
[patent_doc_number] => 09696005
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[patent_kind] => B2
[patent_issue_date] => 2017-07-04
[patent_title] => 'Tunable lighting apparatus'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/180411 | Tunable lighting apparatus | Jun 12, 2016 | Issued |
Array
(
[id] => 11476581
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[patent_kind] => A1
[patent_issue_date] => 2017-03-02
[patent_title] => 'CONTROL UNIT FOR A BRIDGE CIRCUIT, AND RELATED METHOD AND INTEGRATED CIRCUIT'
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[patent_app_number] => 15/163895
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/163895 | Control unit for a bridge circuit, and related method and integrated circuit | May 24, 2016 | Issued |
Array
(
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[patent_title] => 'FEEDTHROUGH SIGNAL TRANSMISSION CIRCUIT AND APPARATUS AND METHOD UTILIZING PERMANENTLY ON BUFFER AND SWITCHABLE NORMAL BUFFER'
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Array
(
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[patent_doc_number] => 09948287
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[patent_title] => Level-shift circuits compatible with multiple supply voltage
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/145562 | Level-shift circuits compatible with multiple supply voltage | May 2, 2016 | Issued |