Search

Patrick C. Chen

Examiner (ID: 1056)

Most Active Art Unit
2842
Art Unit(s)
2836, 2816, 2842
Total Applications
707
Issued Applications
540
Pending Applications
80
Abandoned Applications
100

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 10632183 [patent_doc_number] => 09350343 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-05-24 [patent_title] => 'Multiplex circuit and drive unit using the same' [patent_app_type] => utility [patent_app_number] => 14/064825 [patent_app_country] => US [patent_app_date] => 2013-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 17 [patent_no_of_words] => 5299 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14064825 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/064825
Multiplex circuit and drive unit using the same Oct 27, 2013 Issued
Array ( [id] => 10871151 [patent_doc_number] => 08896356 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2014-11-25 [patent_title] => 'Ramp control with programmable parameters' [patent_app_type] => utility [patent_app_number] => 14/060344 [patent_app_country] => US [patent_app_date] => 2013-10-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4613 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 187 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14060344 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/060344
Ramp control with programmable parameters Oct 21, 2013 Issued
Array ( [id] => 10165092 [patent_doc_number] => 09196318 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-11-24 [patent_title] => 'Low temperature drift voltage reference circuit' [patent_app_type] => utility [patent_app_number] => 14/052425 [patent_app_country] => US [patent_app_date] => 2013-10-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4589 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14052425 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/052425
Low temperature drift voltage reference circuit Oct 10, 2013 Issued
Array ( [id] => 9717563 [patent_doc_number] => 20140253260 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-09-11 [patent_title] => 'HIGH-FREQUENCY SWITCH' [patent_app_type] => utility [patent_app_number] => 14/051057 [patent_app_country] => US [patent_app_date] => 2013-10-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 11285 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14051057 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/051057
HIGH-FREQUENCY SWITCH Oct 9, 2013 Abandoned
Array ( [id] => 10165961 [patent_doc_number] => 09197197 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-11-24 [patent_title] => 'Duty cycle protection circuit' [patent_app_type] => utility [patent_app_number] => 14/050203 [patent_app_country] => US [patent_app_date] => 2013-10-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 2946 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 193 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14050203 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/050203
Duty cycle protection circuit Oct 8, 2013 Issued
Array ( [id] => 9928978 [patent_doc_number] => 20150077170 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-03-19 [patent_title] => 'EFFICIENT WAKEUP OF POWER GATED DOMAINS THROUGH CHARGE SHARING AND RECYCLING' [patent_app_type] => utility [patent_app_number] => 14/026418 [patent_app_country] => US [patent_app_date] => 2013-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 13900 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14026418 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/026418
EFFICIENT WAKEUP OF POWER GATED DOMAINS THROUGH CHARGE SHARING AND RECYCLING Sep 12, 2013 Abandoned
Array ( [id] => 10965217 [patent_doc_number] => 20140368249 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-12-18 [patent_title] => 'DELAY CONTROL CIRCUIT' [patent_app_type] => utility [patent_app_number] => 14/026698 [patent_app_country] => US [patent_app_date] => 2013-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3887 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14026698 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/026698
DELAY CONTROL CIRCUIT Sep 12, 2013 Abandoned
Array ( [id] => 10604733 [patent_doc_number] => 09325307 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-04-26 [patent_title] => 'Semiconductor device' [patent_app_type] => utility [patent_app_number] => 14/012257 [patent_app_country] => US [patent_app_date] => 2013-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 9599 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 355 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14012257 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/012257
Semiconductor device Aug 27, 2013 Issued
Array ( [id] => 10639077 [patent_doc_number] => 09356592 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-05-31 [patent_title] => 'Method of reducing current collapse of power device' [patent_app_type] => utility [patent_app_number] => 13/973379 [patent_app_country] => US [patent_app_date] => 2013-08-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 4464 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13973379 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/973379
Method of reducing current collapse of power device Aug 21, 2013 Issued
Array ( [id] => 10503172 [patent_doc_number] => 09231575 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-01-05 [patent_title] => 'Circuit and method for generating periodic control signals, and microscope and method for controlling a microscope' [patent_app_type] => utility [patent_app_number] => 13/895424 [patent_app_country] => US [patent_app_date] => 2013-05-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 4634 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 188 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13895424 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/895424
Circuit and method for generating periodic control signals, and microscope and method for controlling a microscope May 15, 2013 Issued
Array ( [id] => 10011179 [patent_doc_number] => 09054715 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-06-09 [patent_title] => 'Delay locked loop and semiconductor apparatus' [patent_app_type] => utility [patent_app_number] => 13/845270 [patent_app_country] => US [patent_app_date] => 2013-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 4743 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 209 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13845270 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/845270
Delay locked loop and semiconductor apparatus Mar 17, 2013 Issued
Array ( [id] => 9730631 [patent_doc_number] => 20140266337 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-09-18 [patent_title] => 'NOISE MANAGEMENT METHOD AND CIRCUIT FOR ASYNCHRONOUS SIGNALS' [patent_app_type] => utility [patent_app_number] => 13/840345 [patent_app_country] => US [patent_app_date] => 2013-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4393 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13840345 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/840345
Noise management method and circuit for asynchronous signals Mar 14, 2013 Issued
Array ( [id] => 9730652 [patent_doc_number] => 20140266359 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-09-18 [patent_title] => 'CLOCK CYCLE COMPENSATOR AND THE METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 13/831998 [patent_app_country] => US [patent_app_date] => 2013-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3476 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13831998 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/831998
Clock cycle compensator and the method thereof Mar 14, 2013 Issued
Array ( [id] => 9845220 [patent_doc_number] => 08947143 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-02-03 [patent_title] => 'Duty cycle corrector' [patent_app_type] => utility [patent_app_number] => 13/832029 [patent_app_country] => US [patent_app_date] => 2013-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2678 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13832029 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/832029
Duty cycle corrector Mar 14, 2013 Issued
Array ( [id] => 9717478 [patent_doc_number] => 20140253176 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-09-11 [patent_title] => 'PING PONG COMPARATOR VOLTAGE MONITORING CIRCUIT' [patent_app_type] => utility [patent_app_number] => 13/792835 [patent_app_country] => US [patent_app_date] => 2013-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3227 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13792835 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/792835
Ping pong comparator voltage monitoring circuit Mar 10, 2013 Issued
Array ( [id] => 9014250 [patent_doc_number] => 20130229214 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-09-05 [patent_title] => 'SEMICONDUCTOR DEVICE GENERATING PHASE-CONTROLLED CLOCK SIGNAL' [patent_app_type] => utility [patent_app_number] => 13/784283 [patent_app_country] => US [patent_app_date] => 2013-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 8751 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13784283 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/784283
SEMICONDUCTOR DEVICE GENERATING PHASE-CONTROLLED CLOCK SIGNAL Mar 3, 2013 Abandoned
Array ( [id] => 9014243 [patent_doc_number] => 20130229207 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-09-05 [patent_title] => 'FLOATING GATE DRIVER WITH BETTER SAFE OPERATION AREA AND NOISE IMMUNITY, AND METHOD FOR LEVEL SHIFTING A SWITCH SIGNAL' [patent_app_type] => utility [patent_app_number] => 13/778865 [patent_app_country] => US [patent_app_date] => 2013-02-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 2824 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13778865 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/778865
FLOATING GATE DRIVER WITH BETTER SAFE OPERATION AREA AND NOISE IMMUNITY, AND METHOD FOR LEVEL SHIFTING A SWITCH SIGNAL Feb 26, 2013 Abandoned
Array ( [id] => 10667153 [patent_doc_number] => 20160013299 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-01-14 [patent_title] => 'SEMICONDUCTOR DEVICE, DRIVE DEVICE FOR SEMICONDUCTOR CIRCUIT, AND POWER CONVERSION DEVICE' [patent_app_type] => utility [patent_app_number] => 14/770443 [patent_app_country] => US [patent_app_date] => 2013-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 6837 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14770443 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/770443
SEMICONDUCTOR DEVICE, DRIVE DEVICE FOR SEMICONDUCTOR CIRCUIT, AND POWER CONVERSION DEVICE Feb 24, 2013 Abandoned
Array ( [id] => 10022957 [patent_doc_number] => 09065454 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-06-23 [patent_title] => 'Phase locked loop with self-calibration' [patent_app_type] => utility [patent_app_number] => 13/774757 [patent_app_country] => US [patent_app_date] => 2013-02-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3562 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 169 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13774757 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/774757
Phase locked loop with self-calibration Feb 21, 2013 Issued
Array ( [id] => 10584431 [patent_doc_number] => 09306563 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-04-05 [patent_title] => 'Configurable single-ended driver' [patent_app_type] => utility [patent_app_number] => 13/770984 [patent_app_country] => US [patent_app_date] => 2013-02-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 15 [patent_no_of_words] => 8826 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13770984 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/770984
Configurable single-ended driver Feb 18, 2013 Issued
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