
Patrick C. Chen
Examiner (ID: 16543, Phone: (571)270-7207 , Office: P/2842 )
| Most Active Art Unit | 2842 |
| Art Unit(s) | 2816, 2842 |
| Total Applications | 665 |
| Issued Applications | 516 |
| Pending Applications | 83 |
| Abandoned Applications | 98 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 11418051
[patent_doc_number] => 09564885
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-02-07
[patent_title] => 'Event-driven clock duty cycle control'
[patent_app_type] => utility
[patent_app_number] => 14/361575
[patent_app_country] => US
[patent_app_date] => 2012-11-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
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[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14361575
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/361575 | Event-driven clock duty cycle control | Nov 15, 2012 | Issued |
Array
(
[id] => 12356997
[patent_doc_number] => 09954517
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-04-24
[patent_title] => Apparatuses and methods for duty cycle adjustment
[patent_app_type] => utility
[patent_app_number] => 13/670222
[patent_app_country] => US
[patent_app_date] => 2012-11-06
[patent_effective_date] => 0000-00-00
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/670222 | Apparatuses and methods for duty cycle adjustment | Nov 5, 2012 | Issued |
Array
(
[id] => 8819004
[patent_doc_number] => 20130120049
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-05-16
[patent_title] => 'Power Switch'
[patent_app_type] => utility
[patent_app_number] => 13/666727
[patent_app_country] => US
[patent_app_date] => 2012-11-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/666727 | Power switch | Oct 31, 2012 | Issued |
Array
(
[id] => 8779081
[patent_doc_number] => 20130101056
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-04-25
[patent_title] => 'RECEIVER CIRCUIT AND SYSTEM INCLUDING P-TYPE SENSE AMPLIFIER'
[patent_app_type] => utility
[patent_app_number] => 13/657942
[patent_app_country] => US
[patent_app_date] => 2012-10-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 22
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[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13657942
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/657942 | RECEIVER CIRCUIT AND SYSTEM INCLUDING P-TYPE SENSE AMPLIFIER | Oct 22, 2012 | Abandoned |
Array
(
[id] => 11334056
[patent_doc_number] => 09525310
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2016-12-20
[patent_title] => 'Energy harvesting device using electromagnetic interference signal and sensor system including the same'
[patent_app_type] => utility
[patent_app_number] => 13/655265
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[patent_app_date] => 2012-10-18
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/655265 | Energy harvesting device using electromagnetic interference signal and sensor system including the same | Oct 17, 2012 | Issued |
Array
(
[id] => 8765442
[patent_doc_number] => 20130093479
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-04-18
[patent_title] => 'SEMICONDUCTOR DEVICE AND RADIO COMMUNICATION TERMINAL MOUNTING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 13/654403
[patent_app_country] => US
[patent_app_date] => 2012-10-17
[patent_effective_date] => 0000-00-00
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[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13654403
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/654403 | Semiconductor device and radio communication terminal mounting the same | Oct 16, 2012 | Issued |
Array
(
[id] => 9419312
[patent_doc_number] => 20140103962
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-04-17
[patent_title] => 'HIGH-SPEED GATE DRIVER FOR POWER SWITCHES WITH REDUCED VOLTAGE RINGING'
[patent_app_type] => utility
[patent_app_number] => 13/649372
[patent_app_country] => US
[patent_app_date] => 2012-10-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
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[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13649372
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/649372 | HIGH-SPEED GATE DRIVER FOR POWER SWITCHES WITH REDUCED VOLTAGE RINGING | Oct 10, 2012 | Abandoned |
Array
(
[id] => 9406622
[patent_doc_number] => 20140097874
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-04-10
[patent_title] => 'SYSTEMS AND METHODS OF HARMONIC EXTRACTION AND REJECTION'
[patent_app_type] => utility
[patent_app_number] => 13/646467
[patent_app_country] => US
[patent_app_date] => 2012-10-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
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[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13646467
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/646467 | Systems and methods of harmonic extraction and rejection | Oct 4, 2012 | Issued |
Array
(
[id] => 9394446
[patent_doc_number] => 20140091852
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-04-03
[patent_title] => 'Switch Circuit with a First Transistor Device and a Second Transistor Device Connected in Series'
[patent_app_type] => utility
[patent_app_number] => 13/631459
[patent_app_country] => US
[patent_app_date] => 2012-09-28
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/631459 | Switch circuit with a first transistor device and a second transistor device connected in series | Sep 27, 2012 | Issued |
Array
(
[id] => 9381493
[patent_doc_number] => 20140084974
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-03-27
[patent_title] => 'PHASE LOCKED LOOP WITH BURN-IN MODE'
[patent_app_type] => utility
[patent_app_number] => 13/627333
[patent_app_country] => US
[patent_app_date] => 2012-09-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
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[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13627333
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/627333 | Phase locked loop with burn-in mode | Sep 25, 2012 | Issued |
Array
(
[id] => 8742960
[patent_doc_number] => 20130082677
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-04-04
[patent_title] => 'OUTPUT DRIVING DEVICE'
[patent_app_type] => utility
[patent_app_number] => 13/626824
[patent_app_country] => US
[patent_app_date] => 2012-09-25
[patent_effective_date] => 0000-00-00
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[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13626824
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/626824 | OUTPUT DRIVING DEVICE | Sep 24, 2012 | Abandoned |
Array
(
[id] => 8826473
[patent_doc_number] => 20130127518
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-05-23
[patent_title] => 'CONTROL CIRCUIT AND ELECTRONIC DEVICE'
[patent_app_type] => utility
[patent_app_number] => 13/624122
[patent_app_country] => US
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/624122 | Control circuit and electronic device | Sep 20, 2012 | Issued |
Array
(
[id] => 8718485
[patent_doc_number] => 20130069702
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-03-21
[patent_title] => 'PWM SIGNAL OUTPUT CIRCUIT'
[patent_app_type] => utility
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/617771 | PWM signal output circuit | Sep 13, 2012 | Issued |
Array
(
[id] => 10036017
[patent_doc_number] => 09077348
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2015-07-07
[patent_title] => 'Fractional clock generator'
[patent_app_type] => utility
[patent_app_number] => 13/617903
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/617903 | Fractional clock generator | Sep 13, 2012 | Issued |
Array
(
[id] => 8948239
[patent_doc_number] => 20130194019
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-08-01
[patent_title] => 'SEMICONDUCTOR INTEGRATED CIRCUIT AND METHOD OF OPERATING DEVICE INCLUDING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 13/613953
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/613953 | SEMICONDUCTOR INTEGRATED CIRCUIT AND METHOD OF OPERATING DEVICE INCLUDING THE SAME | Sep 12, 2012 | Abandoned |
Array
(
[id] => 9360981
[patent_doc_number] => 20140070853
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-03-13
[patent_title] => 'RF LOGIC DIVIDER'
[patent_app_type] => utility
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/611691 | RF logic divider | Sep 11, 2012 | Issued |
Array
(
[id] => 13922655
[patent_doc_number] => 10205459
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2019-02-12
[patent_title] => Multi-phase fractional divider
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/609894 | Multi-phase fractional divider | Sep 10, 2012 | Issued |
Array
(
[id] => 8914431
[patent_doc_number] => 20130176056
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[patent_kind] => A1
[patent_issue_date] => 2013-07-11
[patent_title] => 'INVERTER DELAY COMPENSATION CIRCUIT'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/602105 | INVERTER DELAY COMPENSATION CIRCUIT | Aug 31, 2012 | Abandoned |
Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/599693 | CLOCK BUFFER CIRCUIT AND DATA OUTPUT CIRCUIT INCLUDING THE SAME | Aug 29, 2012 | Abandoned |
Array
(
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/563507 | TUNED RESONANT CLOCK DISTRIBUTION SYSTEM | Jul 30, 2012 | Abandoned |