Search

Patrick David Maines

Examiner (ID: 17651, Phone: (571)270-1911 , Office: P/3748 )

Most Active Art Unit
3748
Art Unit(s)
6218, 3748, 3746, 4165, OPQA
Total Applications
641
Issued Applications
540
Pending Applications
9
Abandoned Applications
101

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 9826010 [patent_doc_number] => 08935506 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2015-01-13 [patent_title] => 'MemX: virtualization of cluster-wide memory' [patent_app_type] => utility [patent_app_number] => 13/427110 [patent_app_country] => US [patent_app_date] => 2012-03-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 12199 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13427110 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/427110
MemX: virtualization of cluster-wide memory Mar 21, 2012 Issued
Array ( [id] => 8709854 [patent_doc_number] => 20130067143 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-03-14 [patent_title] => 'MEMORY DEVICE AND METHOD OF CONTROLLING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/427055 [patent_app_country] => US [patent_app_date] => 2012-03-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 8328 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13427055 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/427055
MEMORY DEVICE AND METHOD OF CONTROLLING THE SAME Mar 21, 2012 Abandoned
Array ( [id] => 10879311 [patent_doc_number] => 08904107 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-12-02 [patent_title] => 'Storage apparatus and program update method' [patent_app_type] => utility [patent_app_number] => 13/497689 [patent_app_country] => US [patent_app_date] => 2012-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 17014 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 285 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13497689 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/497689
Storage apparatus and program update method Mar 13, 2012 Issued
Array ( [id] => 8886573 [patent_doc_number] => 20130159757 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-06-20 [patent_title] => 'MEMORY ARRAY CLOCK GATING SCHEME' [patent_app_type] => utility [patent_app_number] => 13/331679 [patent_app_country] => US [patent_app_date] => 2011-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 12433 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13331679 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/331679
Memory array clock gating scheme Dec 19, 2011 Issued
Array ( [id] => 8395538 [patent_doc_number] => 20120233382 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-09-13 [patent_title] => 'DATA STORAGE APPARATUS AND METHOD FOR TABLE MANAGEMENT' [patent_app_type] => utility [patent_app_number] => 13/304188 [patent_app_country] => US [patent_app_date] => 2011-11-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5057 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13304188 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/304188
DATA STORAGE APPARATUS AND METHOD FOR TABLE MANAGEMENT Nov 22, 2011 Abandoned
Array ( [id] => 10867104 [patent_doc_number] => 08892828 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-11-18 [patent_title] => 'Apparatuses and methods for storing validity masks and operating apparatuses' [patent_app_type] => utility [patent_app_number] => 13/299430 [patent_app_country] => US [patent_app_date] => 2011-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 4714 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13299430 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/299430
Apparatuses and methods for storing validity masks and operating apparatuses Nov 17, 2011 Issued
Array ( [id] => 8831622 [patent_doc_number] => 20130132667 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-05-23 [patent_title] => 'ADJUSTMENT OF DESTAGE RATE BASED ON READ AND WRITE RESPONSE TIME REQUIREMENTS' [patent_app_type] => utility [patent_app_number] => 13/299048 [patent_app_country] => US [patent_app_date] => 2011-11-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6282 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13299048 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/299048
Adjustment of destage rate based on read and write response time requirements Nov 16, 2011 Issued
Array ( [id] => 10183950 [patent_doc_number] => 09213629 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-12-15 [patent_title] => 'Block management method, memory controller and memory stoarge apparatus' [patent_app_type] => utility [patent_app_number] => 13/233034 [patent_app_country] => US [patent_app_date] => 2011-09-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 17 [patent_no_of_words] => 9985 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13233034 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/233034
Block management method, memory controller and memory stoarge apparatus Sep 14, 2011 Issued
Array ( [id] => 7664968 [patent_doc_number] => 20110314237 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-12-22 [patent_title] => 'VIRTUAL ORDERED WRITES TRANSFER LOG' [patent_app_type] => utility [patent_app_number] => 13/222321 [patent_app_country] => US [patent_app_date] => 2011-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 28 [patent_no_of_words] => 24461 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13222321 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/222321
Virtual ordered writes transfer log Aug 30, 2011 Issued
Array ( [id] => 9781240 [patent_doc_number] => 08856461 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-10-07 [patent_title] => 'Request controlling' [patent_app_type] => utility [patent_app_number] => 13/217398 [patent_app_country] => US [patent_app_date] => 2011-08-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 8640 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 331 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13217398 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/217398
Request controlling Aug 24, 2011 Issued
Array ( [id] => 10105786 [patent_doc_number] => 09141568 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-09-22 [patent_title] => 'Proportional memory operation throttling' [patent_app_type] => utility [patent_app_number] => 13/217513 [patent_app_country] => US [patent_app_date] => 2011-08-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 14398 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 181 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13217513 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/217513
Proportional memory operation throttling Aug 24, 2011 Issued
Array ( [id] => 8213798 [patent_doc_number] => 20120131258 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-05-24 [patent_title] => 'SEMICONDUCTOR MEMORY APPARATUS AND METHOD FOR OPERATING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/217421 [patent_app_country] => US [patent_app_date] => 2011-08-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6550 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0131/20120131258.pdf [firstpage_image] =>[orig_patent_app_number] => 13217421 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/217421
SEMICONDUCTOR MEMORY APPARATUS AND METHOD FOR OPERATING THE SAME Aug 24, 2011 Abandoned
Array ( [id] => 9665765 [patent_doc_number] => 08812774 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-08-19 [patent_title] => 'Memory system and computer program product' [patent_app_type] => utility [patent_app_number] => 13/217461 [patent_app_country] => US [patent_app_date] => 2011-08-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 13 [patent_no_of_words] => 9077 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 227 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13217461 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/217461
Memory system and computer program product Aug 24, 2011 Issued
Array ( [id] => 10854092 [patent_doc_number] => 08880802 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2014-11-04 [patent_title] => 'I/O control, synchronization method in a raid environment with co-existing hardware and software-based I/O paths' [patent_app_type] => utility [patent_app_number] => 13/212364 [patent_app_country] => US [patent_app_date] => 2011-08-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 3969 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13212364 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/212364
I/O control, synchronization method in a raid environment with co-existing hardware and software-based I/O paths Aug 17, 2011 Issued
Array ( [id] => 9665811 [patent_doc_number] => 08812819 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2014-08-19 [patent_title] => 'Methods and apparatus for reordering data signals in fast fourier transform systems' [patent_app_type] => utility [patent_app_number] => 13/212377 [patent_app_country] => US [patent_app_date] => 2011-08-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 13002 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 219 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13212377 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/212377
Methods and apparatus for reordering data signals in fast fourier transform systems Aug 17, 2011 Issued
Array ( [id] => 7792897 [patent_doc_number] => 20120054453 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-03-01 [patent_title] => 'INFORMATION PROCESSING APPARATUS, INFORMATION PROCESSING METHOD, AND PROGRAM' [patent_app_type] => utility [patent_app_number] => 13/211370 [patent_app_country] => US [patent_app_date] => 2011-08-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5466 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0054/20120054453.pdf [firstpage_image] =>[orig_patent_app_number] => 13211370 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/211370
INFORMATION PROCESSING APPARATUS, INFORMATION PROCESSING METHOD, AND PROGRAM Aug 16, 2011 Abandoned
Array ( [id] => 10524296 [patent_doc_number] => 09250810 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-02-02 [patent_title] => 'Priority based depopulation of storage ranks' [patent_app_type] => utility [patent_app_number] => 13/211508 [patent_app_country] => US [patent_app_date] => 2011-08-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 6346 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 284 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13211508 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/211508
Priority based depopulation of storage ranks Aug 16, 2011 Issued
Array ( [id] => 8661408 [patent_doc_number] => 20130042237 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-02-14 [patent_title] => 'Dynamic Network Adapter Memory Resizing and Bounding for Virtual Function Translation Entry Storage' [patent_app_type] => utility [patent_app_number] => 13/209253 [patent_app_country] => US [patent_app_date] => 2011-08-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 8262 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 12 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13209253 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/209253
Dynamic network adapter memory resizing and bounding for virtual function translation entry storage Aug 11, 2011 Issued
Array ( [id] => 7582203 [patent_doc_number] => 20110296086 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-12-01 [patent_title] => 'FLASH MEMORY HAVING TEST MODE FUNCTION AND CONNECTION TEST METHOD FOR FLASH MEMORY' [patent_app_type] => utility [patent_app_number] => 13/112256 [patent_app_country] => US [patent_app_date] => 2011-05-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 10930 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0296/20110296086.pdf [firstpage_image] =>[orig_patent_app_number] => 13112256 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/112256
FLASH MEMORY HAVING TEST MODE FUNCTION AND CONNECTION TEST METHOD FOR FLASH MEMORY May 19, 2011 Abandoned
Array ( [id] => 8432636 [patent_doc_number] => 20120254511 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-10-04 [patent_title] => 'MEMORY STORAGE DEVICE, MEMORY CONTROLLER, AND DATA WRITING METHOD' [patent_app_type] => utility [patent_app_number] => 13/111959 [patent_app_country] => US [patent_app_date] => 2011-05-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 8431 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13111959 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/111959
Memory storage device, memory controller, and data writing method May 19, 2011 Issued
Menu