Search

Patrick G. Wamsley

Examiner (ID: 13217)

Most Active Art Unit
2819
Art Unit(s)
2514, 2819, 2753, 2513
Total Applications
980
Issued Applications
852
Pending Applications
37
Abandoned Applications
91

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 7646778 [patent_doc_number] => 06476740 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-11-05 [patent_title] => 'Z-coder: a fast adaptive binary arithmetic coder' [patent_app_type] => B1 [patent_app_number] => 10/014907 [patent_app_country] => US [patent_app_date] => 2001-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 5165 [patent_no_of_claims] => 52 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 24 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/476/06476740.pdf [firstpage_image] =>[orig_patent_app_number] => 10014907 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/014907
Z-coder: a fast adaptive binary arithmetic coder Dec 13, 2001 Issued
Array ( [id] => 6124968 [patent_doc_number] => 20020075172 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-06-20 [patent_title] => 'Device for encoding n-bit source words into corresponding m-bit channel words and decoding m-bit channel words into corresponding n-bit source words.' [patent_app_type] => new [patent_app_number] => 10/016168 [patent_app_country] => US [patent_app_date] => 2001-12-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6358 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 29 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0075/20020075172.pdf [firstpage_image] =>[orig_patent_app_number] => 10016168 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/016168
Device for encoding n-bit source words into corresponding m-bit channel words and decoding m-bit channel words into corresponding n-bit source words. Dec 9, 2001 Abandoned
Array ( [id] => 1537434 [patent_doc_number] => 06489914 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-12-03 [patent_title] => 'RSD analog to digital converter' [patent_app_type] => B1 [patent_app_number] => 10/005275 [patent_app_country] => US [patent_app_date] => 2001-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 9 [patent_no_of_words] => 4205 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/489/06489914.pdf [firstpage_image] =>[orig_patent_app_number] => 10005275 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/005275
RSD analog to digital converter Dec 3, 2001 Issued
Array ( [id] => 1384440 [patent_doc_number] => 06563445 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-05-13 [patent_title] => 'Self-calibration methods and structures for pipelined analog-to-digital converters' [patent_app_type] => B1 [patent_app_number] => 09/995967 [patent_app_country] => US [patent_app_date] => 2001-11-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 4928 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/563/06563445.pdf [firstpage_image] =>[orig_patent_app_number] => 09995967 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/995967
Self-calibration methods and structures for pipelined analog-to-digital converters Nov 27, 2001 Issued
Array ( [id] => 1292584 [patent_doc_number] => 06633247 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-10-14 [patent_title] => 'Logarithmic a/d converter, method of logarithmic a/d conversion logarithmic d/a converter, method of logarithmic d/a conversion, and system for measuring physical quantity' [patent_app_type] => B2 [patent_app_number] => 09/958567 [patent_app_country] => US [patent_app_date] => 2001-11-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 11 [patent_no_of_words] => 8508 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 18 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/633/06633247.pdf [firstpage_image] =>[orig_patent_app_number] => 09958567 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/958567
Logarithmic a/d converter, method of logarithmic a/d conversion logarithmic d/a converter, method of logarithmic d/a conversion, and system for measuring physical quantity Nov 26, 2001 Issued
Array ( [id] => 1401379 [patent_doc_number] => 06549151 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-04-15 [patent_title] => 'Method and apparatus for acquiring wide-band pseudorandom noise encoded waveforms' [patent_app_type] => B1 [patent_app_number] => 09/995207 [patent_app_country] => US [patent_app_date] => 2001-11-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 22 [patent_no_of_words] => 7030 [patent_no_of_claims] => 48 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/549/06549151.pdf [firstpage_image] =>[orig_patent_app_number] => 09995207 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/995207
Method and apparatus for acquiring wide-band pseudorandom noise encoded waveforms Nov 25, 2001 Issued
Array ( [id] => 1368220 [patent_doc_number] => 06573849 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-06-03 [patent_title] => 'Semiconductor device having a plurality of AD converters for inverter control of a motor and method thereof' [patent_app_type] => B2 [patent_app_number] => 09/987561 [patent_app_country] => US [patent_app_date] => 2001-11-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 13 [patent_no_of_words] => 3814 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/573/06573849.pdf [firstpage_image] =>[orig_patent_app_number] => 09987561 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/987561
Semiconductor device having a plurality of AD converters for inverter control of a motor and method thereof Nov 14, 2001 Issued
Array ( [id] => 1183229 [patent_doc_number] => 06741193 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-05-25 [patent_title] => 'Parallel in serial out circuit having flip-flop latching at multiple clock rates' [patent_app_type] => B2 [patent_app_number] => 10/010073 [patent_app_country] => US [patent_app_date] => 2001-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 14 [patent_no_of_words] => 5958 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 168 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/741/06741193.pdf [firstpage_image] =>[orig_patent_app_number] => 10010073 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/010073
Parallel in serial out circuit having flip-flop latching at multiple clock rates Nov 7, 2001 Issued
Array ( [id] => 1303989 [patent_doc_number] => 06624761 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-09-23 [patent_title] => 'Content independent data compression method and system' [patent_app_type] => B2 [patent_app_number] => 10/016355 [patent_app_country] => US [patent_app_date] => 2001-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 34 [patent_figures_cnt] => 34 [patent_no_of_words] => 15425 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/624/06624761.pdf [firstpage_image] =>[orig_patent_app_number] => 10016355 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/016355
Content independent data compression method and system Oct 28, 2001 Issued
Array ( [id] => 6868205 [patent_doc_number] => 20030080894 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-05-01 [patent_title] => 'A/D converter' [patent_app_type] => new [patent_app_number] => 09/983658 [patent_app_country] => US [patent_app_date] => 2001-10-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 4485 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0080/20030080894.pdf [firstpage_image] =>[orig_patent_app_number] => 09983658 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/983658
Analog to digital converter selecting reference voltages in accordance with feedback from prior stages Oct 24, 2001 Issued
Array ( [id] => 6868201 [patent_doc_number] => 20030080890 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-05-01 [patent_title] => 'Broadband IF conversion using two ADCs' [patent_app_type] => new [patent_app_number] => 09/982472 [patent_app_country] => US [patent_app_date] => 2001-10-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3837 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0080/20030080890.pdf [firstpage_image] =>[orig_patent_app_number] => 09982472 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/982472
Broadband IF conversion using two ADCs Oct 17, 2001 Issued
Array ( [id] => 1441610 [patent_doc_number] => 06496126 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2002-12-17 [patent_title] => 'Digitization apparatus and method using a finite state machine in feedback loop' [patent_app_type] => B2 [patent_app_number] => 09/981861 [patent_app_country] => US [patent_app_date] => 2001-10-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2562 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/496/06496126.pdf [firstpage_image] =>[orig_patent_app_number] => 09981861 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/981861
Digitization apparatus and method using a finite state machine in feedback loop Oct 16, 2001 Issued
Array ( [id] => 6743460 [patent_doc_number] => 20030020643 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-01-30 [patent_title] => 'Method and chip design for increasing yield of analogue/digital converter chips' [patent_app_type] => new [patent_app_number] => 09/976761 [patent_app_country] => US [patent_app_date] => 2001-10-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 1762 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0020/20030020643.pdf [firstpage_image] =>[orig_patent_app_number] => 09976761 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/976761
Method and chip design for increasing yield of analogue/digital converter chips Oct 11, 2001 Abandoned
Array ( [id] => 6205976 [patent_doc_number] => 20020070765 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-06-13 [patent_title] => 'Data slicer circuit' [patent_app_type] => new [patent_app_number] => 09/975576 [patent_app_country] => US [patent_app_date] => 2001-10-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3713 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0070/20020070765.pdf [firstpage_image] =>[orig_patent_app_number] => 09975576 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/975576
Differential input data slicer Oct 10, 2001 Issued
Array ( [id] => 6154739 [patent_doc_number] => 20020145472 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-10-10 [patent_title] => 'Single-bit sigma-delta modulated fractional-N frequency synthesizer' [patent_app_type] => new [patent_app_number] => 09/973072 [patent_app_country] => US [patent_app_date] => 2001-10-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4339 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0145/20020145472.pdf [firstpage_image] =>[orig_patent_app_number] => 09973072 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/973072
Single-bit sigma-delta modulated fractional-N frequency synthesizer Oct 9, 2001 Abandoned
Array ( [id] => 1389189 [patent_doc_number] => 06559786 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-05-06 [patent_title] => 'Circuit arrangement for conversion of an input current signal to a corresponding digital output signal' [patent_app_type] => B2 [patent_app_number] => 09/973371 [patent_app_country] => US [patent_app_date] => 2001-10-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 3883 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/559/06559786.pdf [firstpage_image] =>[orig_patent_app_number] => 09973371 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/973371
Circuit arrangement for conversion of an input current signal to a corresponding digital output signal Oct 8, 2001 Issued
Array ( [id] => 1422596 [patent_doc_number] => 06525678 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-02-25 [patent_title] => 'Configuring a programmable logic device' [patent_app_type] => B1 [patent_app_number] => 09/972674 [patent_app_country] => US [patent_app_date] => 2001-10-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3804 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/525/06525678.pdf [firstpage_image] =>[orig_patent_app_number] => 09972674 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/972674
Configuring a programmable logic device Oct 4, 2001 Issued
Array ( [id] => 1441633 [patent_doc_number] => 06496131 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2002-12-17 [patent_title] => 'Capacitor-array D/A converter including a thermometer decoder and a capacitor array' [patent_app_type] => B2 [patent_app_number] => 09/963063 [patent_app_country] => US [patent_app_date] => 2001-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 14 [patent_no_of_words] => 7548 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 287 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/496/06496131.pdf [firstpage_image] =>[orig_patent_app_number] => 09963063 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/963063
Capacitor-array D/A converter including a thermometer decoder and a capacitor array Sep 24, 2001 Issued
Array ( [id] => 1408456 [patent_doc_number] => 06542089 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-04-01 [patent_title] => 'Rear mounted integrated rotary encoder' [patent_app_type] => B1 [patent_app_number] => 09/957371 [patent_app_country] => US [patent_app_date] => 2001-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 2281 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/542/06542089.pdf [firstpage_image] =>[orig_patent_app_number] => 09957371 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/957371
Rear mounted integrated rotary encoder Sep 20, 2001 Issued
Array ( [id] => 5949231 [patent_doc_number] => 20020005792 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-01-17 [patent_title] => 'Coding apparatus and decoding apparatus' [patent_app_type] => new [patent_app_number] => 09/950783 [patent_app_country] => US [patent_app_date] => 2001-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 27 [patent_no_of_words] => 17229 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 22 [patent_words_short_claim] => 45 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0005/20020005792.pdf [firstpage_image] =>[orig_patent_app_number] => 09950783 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/950783
Encoding and decoding apparatus using context Sep 12, 2001 Issued
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