Search

Patrick G. Wamsley

Examiner (ID: 5811)

Most Active Art Unit
2819
Art Unit(s)
2514, 2819, 2513, 2753
Total Applications
980
Issued Applications
852
Pending Applications
37
Abandoned Applications
91

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 6910509 [patent_doc_number] => 20050174267 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-08-11 [patent_title] => 'MODULATION APPARATUS AND METHOD, AND DSV-CONTROL-BIT GENERATING METHOD' [patent_app_type] => utility [patent_app_number] => 11/102406 [patent_app_country] => US [patent_app_date] => 2005-04-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 13438 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0174/20050174267.pdf [firstpage_image] =>[orig_patent_app_number] => 11102406 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/102406
Modulation apparatus and method, and DSV-control-bit generating method Apr 6, 2005 Issued
Array ( [id] => 946995 [patent_doc_number] => 06965329 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-11-15 [patent_title] => 'Modulation apparatus and method, and DSV-control-bit generating method' [patent_app_type] => utility [patent_app_number] => 11/102372 [patent_app_country] => US [patent_app_date] => 2005-04-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 13 [patent_no_of_words] => 13447 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 330 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/965/06965329.pdf [firstpage_image] =>[orig_patent_app_number] => 11102372 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/102372
Modulation apparatus and method, and DSV-control-bit generating method Apr 6, 2005 Issued
Array ( [id] => 656495 [patent_doc_number] => 07109901 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-09-19 [patent_title] => 'Use of and gates with a write control circuit for trimming a bleeder resistor' [patent_app_type] => utility [patent_app_number] => 11/092774 [patent_app_country] => US [patent_app_date] => 2005-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1406 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/109/07109901.pdf [firstpage_image] =>[orig_patent_app_number] => 11092774 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/092774
Use of and gates with a write control circuit for trimming a bleeder resistor Mar 28, 2005 Issued
Array ( [id] => 935787 [patent_doc_number] => 06975137 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-12-13 [patent_title] => 'Programmable logic devices with integrated standard-cell logic blocks' [patent_app_type] => utility [patent_app_number] => 11/055280 [patent_app_country] => US [patent_app_date] => 2005-02-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 7393 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/975/06975137.pdf [firstpage_image] =>[orig_patent_app_number] => 11055280 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/055280
Programmable logic devices with integrated standard-cell logic blocks Feb 9, 2005 Issued
Array ( [id] => 735512 [patent_doc_number] => 07038603 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-05-02 [patent_title] => 'Analog to digital converter using analog-valued floating-gate transistors' [patent_app_type] => utility [patent_app_number] => 11/055947 [patent_app_country] => US [patent_app_date] => 2005-02-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 43 [patent_no_of_words] => 8942 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 199 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/038/07038603.pdf [firstpage_image] =>[orig_patent_app_number] => 11055947 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/055947
Analog to digital converter using analog-valued floating-gate transistors Feb 9, 2005 Issued
Array ( [id] => 717908 [patent_doc_number] => 07053803 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2006-05-30 [patent_title] => 'Data compression' [patent_app_type] => utility [patent_app_number] => 11/060730 [patent_app_country] => US [patent_app_date] => 2005-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 6797 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/053/07053803.pdf [firstpage_image] =>[orig_patent_app_number] => 11060730 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/060730
Data compression Jan 30, 2005 Issued
Array ( [id] => 567911 [patent_doc_number] => 07158067 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-01-02 [patent_title] => 'Analog to digital converter using sawtooth voltage signals with differential comparator' [patent_app_type] => utility [patent_app_number] => 11/053756 [patent_app_country] => US [patent_app_date] => 2005-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 8404 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/158/07158067.pdf [firstpage_image] =>[orig_patent_app_number] => 11053756 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/053756
Analog to digital converter using sawtooth voltage signals with differential comparator Jan 30, 2005 Issued
Array ( [id] => 7109083 [patent_doc_number] => 20050206537 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-09-22 [patent_title] => 'Systems and processes for decoding a chain reaction code through inactivation' [patent_app_type] => utility [patent_app_number] => 11/031331 [patent_app_country] => US [patent_app_date] => 2005-01-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 6919 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0206/20050206537.pdf [firstpage_image] =>[orig_patent_app_number] => 11031331 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/031331
Systems and processes for decoding a chain reaction code through inactivation Jan 6, 2005 Issued
Array ( [id] => 775361 [patent_doc_number] => 07002506 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2006-02-21 [patent_title] => 'Providing pipe line ADC with acceptable bit error and power efficiency combination' [patent_app_type] => utility [patent_app_number] => 10/905271 [patent_app_country] => US [patent_app_date] => 2004-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 11 [patent_no_of_words] => 6117 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/002/07002506.pdf [firstpage_image] =>[orig_patent_app_number] => 10905271 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/905271
Providing pipe line ADC with acceptable bit error and power efficiency combination Dec 22, 2004 Issued
Array ( [id] => 709385 [patent_doc_number] => 07061417 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-06-13 [patent_title] => 'Method and system for increased effective resolution in an N-bit digital-to-analog converter' [patent_app_type] => utility [patent_app_number] => 10/997105 [patent_app_country] => US [patent_app_date] => 2004-11-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 5861 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/061/07061417.pdf [firstpage_image] =>[orig_patent_app_number] => 10997105 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/997105
Method and system for increased effective resolution in an N-bit digital-to-analog converter Nov 23, 2004 Issued
Array ( [id] => 717910 [patent_doc_number] => 07053804 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2006-05-30 [patent_title] => 'Phase-error reduction methods and controllers for time-interleaved analog-to-digital systems' [patent_app_type] => utility [patent_app_number] => 10/992884 [patent_app_country] => US [patent_app_date] => 2004-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 11 [patent_no_of_words] => 4923 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/053/07053804.pdf [firstpage_image] =>[orig_patent_app_number] => 10992884 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/992884
Phase-error reduction methods and controllers for time-interleaved analog-to-digital systems Nov 17, 2004 Issued
Array ( [id] => 735530 [patent_doc_number] => 07038609 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2006-05-02 [patent_title] => 'Successive approximation analog-to-digital converter with pre-loaded SAR registers' [patent_app_type] => utility [patent_app_number] => 10/976610 [patent_app_country] => US [patent_app_date] => 2004-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 13 [patent_no_of_words] => 7425 [patent_no_of_claims] => 45 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/038/07038609.pdf [firstpage_image] =>[orig_patent_app_number] => 10976610 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/976610
Successive approximation analog-to-digital converter with pre-loaded SAR registers Oct 28, 2004 Issued
Array ( [id] => 5805703 [patent_doc_number] => 20060092056 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-05-04 [patent_title] => 'SAMPLE RATE DOUBLING USING ALTERNATING ADCS' [patent_app_type] => utility [patent_app_number] => 10/977833 [patent_app_country] => US [patent_app_date] => 2004-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3925 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0092/20060092056.pdf [firstpage_image] =>[orig_patent_app_number] => 10977833 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/977833
Sample rate doubling using alternating ADCs Oct 28, 2004 Issued
Array ( [id] => 6916161 [patent_doc_number] => 20050093722 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-05-05 [patent_title] => 'VIDEO SIGNAL PROCESSING SYSTEM INCLUDING ANALOG TO DIGITAL CONVERTER AND RELATED METHOD FOR CALIBRATING ANALOG TO DIGITAL CONVERTER' [patent_app_type] => utility [patent_app_number] => 10/904159 [patent_app_country] => US [patent_app_date] => 2004-10-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4973 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0093/20050093722.pdf [firstpage_image] =>[orig_patent_app_number] => 10904159 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/904159
Video signal processing system including analog to digital converter and related method for calibrating analog to digital converter Oct 26, 2004 Issued
Array ( [id] => 5818545 [patent_doc_number] => 20060022858 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-02-02 [patent_title] => 'ADC CALIBRATION TO ACCOMMODATE TEMPERATURE VARIATION USING VERTICAL BLANKING INTERRUPTS' [patent_app_type] => utility [patent_app_number] => 10/904143 [patent_app_country] => US [patent_app_date] => 2004-10-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2135 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0022/20060022858.pdf [firstpage_image] =>[orig_patent_app_number] => 10904143 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/904143
ADC calibration to accommodate temperature variation using vertical blanking interrupts Oct 25, 2004 Issued
Array ( [id] => 7008786 [patent_doc_number] => 20050062502 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-03-24 [patent_title] => 'Logic circuit whose power switch is quickly turned on and off' [patent_app_type] => utility [patent_app_number] => 10/964634 [patent_app_country] => US [patent_app_date] => 2004-10-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 15805 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0062/20050062502.pdf [firstpage_image] =>[orig_patent_app_number] => 10964634 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/964634
Logic circuit whose power switch is quickly turned on and off Oct 14, 2004 Issued
Array ( [id] => 956765 [patent_doc_number] => 06956519 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-10-18 [patent_title] => 'Switched capacitor circuit of a pipeline analog to digital converter and a method for operating the switched capacitor circuit' [patent_app_type] => utility [patent_app_number] => 10/711877 [patent_app_country] => US [patent_app_date] => 2004-10-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 4122 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/956/06956519.pdf [firstpage_image] =>[orig_patent_app_number] => 10711877 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/711877
Switched capacitor circuit of a pipeline analog to digital converter and a method for operating the switched capacitor circuit Oct 10, 2004 Issued
Array ( [id] => 938872 [patent_doc_number] => 06972701 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-12-06 [patent_title] => 'A/D converter calibration' [patent_app_type] => utility [patent_app_number] => 10/950271 [patent_app_country] => US [patent_app_date] => 2004-09-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 4109 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/972/06972701.pdf [firstpage_image] =>[orig_patent_app_number] => 10950271 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/950271
A/D converter calibration Sep 23, 2004 Issued
Array ( [id] => 673643 [patent_doc_number] => 07091884 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-08-15 [patent_title] => 'Analog position encoder' [patent_app_type] => utility [patent_app_number] => 10/947146 [patent_app_country] => US [patent_app_date] => 2004-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 3705 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/091/07091884.pdf [firstpage_image] =>[orig_patent_app_number] => 10947146 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/947146
Analog position encoder Sep 22, 2004 Issued
Array ( [id] => 944554 [patent_doc_number] => 06967610 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-11-22 [patent_title] => 'Low power bit and one-half analog to digital converter' [patent_app_type] => utility [patent_app_number] => 10/946321 [patent_app_country] => US [patent_app_date] => 2004-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 26 [patent_no_of_words] => 3945 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/967/06967610.pdf [firstpage_image] =>[orig_patent_app_number] => 10946321 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/946321
Low power bit and one-half analog to digital converter Sep 20, 2004 Issued
Menu