Search

Patrick G. Wamsley

Examiner (ID: 13217)

Most Active Art Unit
2819
Art Unit(s)
2514, 2819, 2753, 2513
Total Applications
980
Issued Applications
852
Pending Applications
37
Abandoned Applications
91

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 1566903 [patent_doc_number] => 06339387 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-01-15 [patent_title] => 'Serial/parallel converter' [patent_app_type] => B1 [patent_app_number] => 09/583232 [patent_app_country] => US [patent_app_date] => 2000-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 32 [patent_figures_cnt] => 36 [patent_no_of_words] => 16803 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/339/06339387.pdf [firstpage_image] =>[orig_patent_app_number] => 09583232 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/583232
Serial/parallel converter May 30, 2000 Issued
Array ( [id] => 4312842 [patent_doc_number] => 06188334 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-02-13 [patent_title] => 'Z-coder: fast adaptive binary arithmetic coder' [patent_app_type] => 1 [patent_app_number] => 9/565443 [patent_app_country] => US [patent_app_date] => 2000-05-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 5189 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 229 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/188/06188334.pdf [firstpage_image] =>[orig_patent_app_number] => 565443 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/565443
Z-coder: fast adaptive binary arithmetic coder May 4, 2000 Issued
Array ( [id] => 4327789 [patent_doc_number] => 06249235 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-06-19 [patent_title] => 'Sampling frequency conversion apparatus and fractional frequency dividing apparatus for sampling frequency' [patent_app_type] => 1 [patent_app_number] => 9/533601 [patent_app_country] => US [patent_app_date] => 2000-03-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3646 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/249/06249235.pdf [firstpage_image] =>[orig_patent_app_number] => 533601 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/533601
Sampling frequency conversion apparatus and fractional frequency dividing apparatus for sampling frequency Mar 22, 2000 Issued
Array ( [id] => 4193350 [patent_doc_number] => 06150965 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-11-21 [patent_title] => 'Serial to parallel converter enabled by multiplexed flip-flop counters' [patent_app_type] => 1 [patent_app_number] => 9/518670 [patent_app_country] => US [patent_app_date] => 2000-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 3266 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 174 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/150/06150965.pdf [firstpage_image] =>[orig_patent_app_number] => 518670 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/518670
Serial to parallel converter enabled by multiplexed flip-flop counters Mar 2, 2000 Issued
Array ( [id] => 4389015 [patent_doc_number] => 06304201 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-10-16 [patent_title] => 'Precision digital-to-analog converters and methods having programmable trim adjustments' [patent_app_type] => 1 [patent_app_number] => 9/489955 [patent_app_country] => US [patent_app_date] => 2000-01-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4291 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 181 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/304/06304201.pdf [firstpage_image] =>[orig_patent_app_number] => 489955 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/489955
Precision digital-to-analog converters and methods having programmable trim adjustments Jan 23, 2000 Issued
Array ( [id] => 4327784 [patent_doc_number] => 06331833 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-12-18 [patent_title] => 'Highly linear sigma-delta modulator having graceful degradation of signal-to-noise ratio in overload condition' [patent_app_type] => 1 [patent_app_number] => 9/488660 [patent_app_country] => US [patent_app_date] => 2000-01-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 14 [patent_no_of_words] => 3655 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/331/06331833.pdf [firstpage_image] =>[orig_patent_app_number] => 488660 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/488660
Highly linear sigma-delta modulator having graceful degradation of signal-to-noise ratio in overload condition Jan 19, 2000 Issued
Array ( [id] => 4161950 [patent_doc_number] => 06124817 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-09-26 [patent_title] => 'Noise-equalized DAC and device capable of equalizing noise in SRAM' [patent_app_type] => 1 [patent_app_number] => 9/481944 [patent_app_country] => US [patent_app_date] => 2000-01-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 18 [patent_no_of_words] => 2676 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 217 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/124/06124817.pdf [firstpage_image] =>[orig_patent_app_number] => 481944 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/481944
Noise-equalized DAC and device capable of equalizing noise in SRAM Jan 12, 2000 Issued
Array ( [id] => 4380523 [patent_doc_number] => RE037195 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-05-29 [patent_title] => 'Programmable switch for FPGA input/output signals' [patent_app_type] => 2 [patent_app_number] => 9/478778 [patent_app_country] => US [patent_app_date] => 2000-01-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 27 [patent_no_of_words] => 12616 [patent_no_of_claims] => 59 [patent_no_of_ind_claims] => 31 [patent_words_short_claim] => 53 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/RE/037/RE037195.pdf [firstpage_image] =>[orig_patent_app_number] => 478778 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/478778
Programmable switch for FPGA input/output signals Jan 5, 2000 Issued
Array ( [id] => 4362673 [patent_doc_number] => 06292118 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-09-18 [patent_title] => 'System for quantizing an analog signal utilizing a resonant tunneling diode bridge' [patent_app_type] => 1 [patent_app_number] => 9/478041 [patent_app_country] => US [patent_app_date] => 2000-01-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 10 [patent_no_of_words] => 3994 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/292/06292118.pdf [firstpage_image] =>[orig_patent_app_number] => 478041 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/478041
System for quantizing an analog signal utilizing a resonant tunneling diode bridge Jan 4, 2000 Issued
Array ( [id] => 4261751 [patent_doc_number] => 06208282 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-03-27 [patent_title] => 'A/D converter with input capacitor, feedback capacitor, and two invertors' [patent_app_type] => 1 [patent_app_number] => 9/474756 [patent_app_country] => US [patent_app_date] => 1999-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 59 [patent_figures_cnt] => 85 [patent_no_of_words] => 20360 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 173 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/208/06208282.pdf [firstpage_image] =>[orig_patent_app_number] => 474756 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/474756
A/D converter with input capacitor, feedback capacitor, and two invertors Dec 28, 1999 Issued
Array ( [id] => 1537746 [patent_doc_number] => 06337642 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-01-08 [patent_title] => 'Method for efficient interleaving of variable length packets with maximized block size' [patent_app_type] => B1 [patent_app_number] => 09/473155 [patent_app_country] => US [patent_app_date] => 1999-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1756 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 242 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/337/06337642.pdf [firstpage_image] =>[orig_patent_app_number] => 09473155 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/473155
Method for efficient interleaving of variable length packets with maximized block size Dec 27, 1999 Issued
Array ( [id] => 4354476 [patent_doc_number] => 06285302 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-09-04 [patent_title] => 'Runlength-limited code and method' [patent_app_type] => 1 [patent_app_number] => 9/464654 [patent_app_country] => US [patent_app_date] => 1999-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 16 [patent_no_of_words] => 5368 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 203 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/285/06285302.pdf [firstpage_image] =>[orig_patent_app_number] => 464654 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/464654
Runlength-limited code and method Dec 14, 1999 Issued
Array ( [id] => 1437144 [patent_doc_number] => 06356215 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-03-12 [patent_title] => 'Device for encoding n-bit source words into corresponding m-bit channel words and decoding m-bit channel words into corresponding n-bit source words' [patent_app_type] => B1 [patent_app_number] => 09/460940 [patent_app_country] => US [patent_app_date] => 1999-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 6283 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/356/06356215.pdf [firstpage_image] =>[orig_patent_app_number] => 09460940 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/460940
Device for encoding n-bit source words into corresponding m-bit channel words and decoding m-bit channel words into corresponding n-bit source words Dec 13, 1999 Issued
Array ( [id] => 1026030 [patent_doc_number] => 06885324 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-04-26 [patent_title] => 'Method and apparatus for testing or calibrating an analog to digital converter using a phase locked loop' [patent_app_type] => utility [patent_app_number] => 09/345568 [patent_app_country] => US [patent_app_date] => 1999-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 1942 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/885/06885324.pdf [firstpage_image] =>[orig_patent_app_number] => 09345568 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/345568
Method and apparatus for testing or calibrating an analog to digital converter using a phase locked loop Dec 12, 1999 Issued
Array ( [id] => 1589008 [patent_doc_number] => 06359575 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-03-19 [patent_title] => 'Analog to digital converter having a digital to analog converter mode' [patent_app_type] => B1 [patent_app_number] => 09/458539 [patent_app_country] => US [patent_app_date] => 1999-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 7930 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/359/06359575.pdf [firstpage_image] =>[orig_patent_app_number] => 09458539 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/458539
Analog to digital converter having a digital to analog converter mode Dec 8, 1999 Issued
Array ( [id] => 1551541 [patent_doc_number] => 06346899 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-02-12 [patent_title] => 'Analog current mode D/A converter using transconductors' [patent_app_type] => B1 [patent_app_number] => 09/453551 [patent_app_country] => US [patent_app_date] => 1999-12-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5052 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/346/06346899.pdf [firstpage_image] =>[orig_patent_app_number] => 09453551 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/453551
Analog current mode D/A converter using transconductors Dec 2, 1999 Issued
Array ( [id] => 1525269 [patent_doc_number] => 06353400 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-03-05 [patent_title] => 'Radically abbreviated decoding' [patent_app_type] => B1 [patent_app_number] => 09/447537 [patent_app_country] => US [patent_app_date] => 1999-11-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 2159 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/353/06353400.pdf [firstpage_image] =>[orig_patent_app_number] => 09447537 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/447537
Radically abbreviated decoding Nov 22, 1999 Issued
Array ( [id] => 4340868 [patent_doc_number] => 06313776 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-11-06 [patent_title] => 'Calibrated line driver with digital-to-analog converter' [patent_app_type] => 1 [patent_app_number] => 9/444763 [patent_app_country] => US [patent_app_date] => 1999-11-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 6985 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 215 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/313/06313776.pdf [firstpage_image] =>[orig_patent_app_number] => 444763 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/444763
Calibrated line driver with digital-to-analog converter Nov 21, 1999 Issued
Array ( [id] => 1551566 [patent_doc_number] => 06346905 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-02-12 [patent_title] => 'Analog-to-digital flash converter for generating a thermometric digital code' [patent_app_type] => B1 [patent_app_number] => 09/447065 [patent_app_country] => US [patent_app_date] => 1999-11-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1386 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/346/06346905.pdf [firstpage_image] =>[orig_patent_app_number] => 09447065 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/447065
Analog-to-digital flash converter for generating a thermometric digital code Nov 21, 1999 Issued
Array ( [id] => 1479336 [patent_doc_number] => 06344808 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-02-05 [patent_title] => 'MPEG-1 audio layer III decoding device achieving fast processing by eliminating an arithmetic operation providing a previously known operation result' [patent_app_type] => B1 [patent_app_number] => 09/441658 [patent_app_country] => US [patent_app_date] => 1999-11-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 9143 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 206 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/344/06344808.pdf [firstpage_image] =>[orig_patent_app_number] => 09441658 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/441658
MPEG-1 audio layer III decoding device achieving fast processing by eliminating an arithmetic operation providing a previously known operation result Nov 15, 1999 Issued
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