Search

Patrick G. Wamsley

Examiner (ID: 2182)

Most Active Art Unit
2819
Art Unit(s)
2753, 2819, 2514, 2513
Total Applications
980
Issued Applications
852
Pending Applications
37
Abandoned Applications
91

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 3756165 [patent_doc_number] => 05787298 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-07-28 [patent_title] => 'Bus interface circuit for an intelligent low power serial bus' [patent_app_type] => 1 [patent_app_number] => 8/516849 [patent_app_country] => US [patent_app_date] => 1995-08-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 47 [patent_no_of_words] => 37719 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/787/05787298.pdf [firstpage_image] =>[orig_patent_app_number] => 516849 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/516849
Bus interface circuit for an intelligent low power serial bus Aug 17, 1995 Issued
08/513714 MODULAR SOLID STATE POWER CONTROLLER WITH MICROCONTROLLER Aug 10, 1995 Abandoned
Array ( [id] => 3873002 [patent_doc_number] => 05768602 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-06-16 [patent_title] => 'Sleep mode controller for power management' [patent_app_type] => 1 [patent_app_number] => 8/511158 [patent_app_country] => US [patent_app_date] => 1995-08-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 5176 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 197 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/768/05768602.pdf [firstpage_image] =>[orig_patent_app_number] => 511158 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/511158
Sleep mode controller for power management Aug 3, 1995 Issued
08/510545 METHOD AND APPARATUS FOR REDUCING CUMULATIVE TIME DELAY IN SYNCHRONIZING TRANSFER OF BUFFERED DATA BETWEEN TWO MUTUALLY ASYNCHRONOUS BUSES Aug 1, 1995 Abandoned
Array ( [id] => 3893591 [patent_doc_number] => 05729705 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-03-17 [patent_title] => 'Method and apparatus for enhancing throughput of disk array data transfers in a controller' [patent_app_type] => 1 [patent_app_number] => 8/506148 [patent_app_country] => US [patent_app_date] => 1995-07-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 3868 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/729/05729705.pdf [firstpage_image] =>[orig_patent_app_number] => 506148 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/506148
Method and apparatus for enhancing throughput of disk array data transfers in a controller Jul 23, 1995 Issued
Array ( [id] => 3824740 [patent_doc_number] => 05710892 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-01-20 [patent_title] => 'System and method for asynchronous dual bus conversion using double state machines' [patent_app_type] => 1 [patent_app_number] => 8/504347 [patent_app_country] => US [patent_app_date] => 1995-07-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3674 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/710/05710892.pdf [firstpage_image] =>[orig_patent_app_number] => 504347 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/504347
System and method for asynchronous dual bus conversion using double state machines Jul 18, 1995 Issued
Array ( [id] => 3700714 [patent_doc_number] => 05644731 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-07-01 [patent_title] => 'Method and apparatus for hot plugging/unplugging a sub-system to an electrically powered system' [patent_app_type] => 1 [patent_app_number] => 8/499150 [patent_app_country] => US [patent_app_date] => 1995-07-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 24 [patent_no_of_words] => 4801 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/644/05644731.pdf [firstpage_image] =>[orig_patent_app_number] => 499150 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/499150
Method and apparatus for hot plugging/unplugging a sub-system to an electrically powered system Jul 6, 1995 Issued
Array ( [id] => 3642816 [patent_doc_number] => 05687391 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-11-11 [patent_title] => 'Fault tolerant multipoint control and data collection system' [patent_app_type] => 1 [patent_app_number] => 8/497652 [patent_app_country] => US [patent_app_date] => 1995-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 17 [patent_no_of_words] => 13372 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 297 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/687/05687391.pdf [firstpage_image] =>[orig_patent_app_number] => 497652 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/497652
Fault tolerant multipoint control and data collection system Jun 29, 1995 Issued
Array ( [id] => 3796173 [patent_doc_number] => 05758104 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-05-26 [patent_title] => 'Random delay subsystems' [patent_app_type] => 1 [patent_app_number] => 8/518352 [patent_app_country] => US [patent_app_date] => 1995-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3263 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 218 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/758/05758104.pdf [firstpage_image] =>[orig_patent_app_number] => 518352 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/518352
Random delay subsystems Jun 13, 1995 Issued
Array ( [id] => 3849376 [patent_doc_number] => 05761446 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-06-02 [patent_title] => 'Livelock avoidance' [patent_app_type] => 1 [patent_app_number] => 8/518353 [patent_app_country] => US [patent_app_date] => 1995-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3192 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 180 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/761/05761446.pdf [firstpage_image] =>[orig_patent_app_number] => 518353 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/518353
Livelock avoidance Jun 13, 1995 Issued
Array ( [id] => 3919348 [patent_doc_number] => 05752044 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-05-12 [patent_title] => 'Computer system having multi-level suspend timers to suspend from operation in attended and unattended modes' [patent_app_type] => 1 [patent_app_number] => 8/477857 [patent_app_country] => US [patent_app_date] => 1995-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 57 [patent_figures_cnt] => 60 [patent_no_of_words] => 43052 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 172 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/752/05752044.pdf [firstpage_image] =>[orig_patent_app_number] => 477857 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/477857
Computer system having multi-level suspend timers to suspend from operation in attended and unattended modes Jun 6, 1995 Issued
Array ( [id] => 3837000 [patent_doc_number] => 05790868 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-08-04 [patent_title] => 'Customer information control system and method with transaction serialization control functions in a loosely coupled parallel processing environment' [patent_app_type] => 1 [patent_app_number] => 8/479701 [patent_app_country] => US [patent_app_date] => 1995-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 7756 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 254 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/790/05790868.pdf [firstpage_image] =>[orig_patent_app_number] => 479701 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/479701
Customer information control system and method with transaction serialization control functions in a loosely coupled parallel processing environment Jun 6, 1995 Issued
Array ( [id] => 4015268 [patent_doc_number] => 05925129 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-07-20 [patent_title] => 'Desktop computer system having compressed suspend to hardfile' [patent_app_type] => 1 [patent_app_number] => 8/472207 [patent_app_country] => US [patent_app_date] => 1995-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 37 [patent_figures_cnt] => 38 [patent_no_of_words] => 28891 [patent_no_of_claims] => 43 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/925/05925129.pdf [firstpage_image] =>[orig_patent_app_number] => 472207 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/472207
Desktop computer system having compressed suspend to hardfile Jun 6, 1995 Issued
Array ( [id] => 3674327 [patent_doc_number] => 05657458 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-08-12 [patent_title] => 'Method for controlling a bus to progress transfer cycles without inserting a cycle for acknowledgment' [patent_app_type] => 1 [patent_app_number] => 8/480397 [patent_app_country] => US [patent_app_date] => 1995-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 5213 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 237 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/657/05657458.pdf [firstpage_image] =>[orig_patent_app_number] => 480397 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/480397
Method for controlling a bus to progress transfer cycles without inserting a cycle for acknowledgment Jun 6, 1995 Issued
Array ( [id] => 3621085 [patent_doc_number] => 05590290 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-12-31 [patent_title] => 'Method for controlling a bus to progress transfer cycles without inserting a cycle for acknowledgement' [patent_app_type] => 1 [patent_app_number] => 8/487401 [patent_app_country] => US [patent_app_date] => 1995-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 159 [patent_no_of_words] => 5209 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/590/05590290.pdf [firstpage_image] =>[orig_patent_app_number] => 487401 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/487401
Method for controlling a bus to progress transfer cycles without inserting a cycle for acknowledgement Jun 6, 1995 Issued
Array ( [id] => 3701675 [patent_doc_number] => 05604874 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-02-18 [patent_title] => 'Method for controlling a bus to progress transfer cycles without inserting a cycle for acknowledgment' [patent_app_type] => 1 [patent_app_number] => 8/480395 [patent_app_country] => US [patent_app_date] => 1995-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 5209 [patent_no_of_claims] => 42 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 214 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/604/05604874.pdf [firstpage_image] =>[orig_patent_app_number] => 480395 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/480395
Method for controlling a bus to progress transfer cycles without inserting a cycle for acknowledgment Jun 6, 1995 Issued
08/472605 SYSTEM MANAGEMENT MODE CIRCUITS, SYSTEMS AND METHODS Jun 6, 1995 Abandoned
Array ( [id] => 3848666 [patent_doc_number] => 05740436 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-04-14 [patent_title] => 'System architecture for configuring input and output devices of a computer' [patent_app_type] => 1 [patent_app_number] => 8/471656 [patent_app_country] => US [patent_app_date] => 1995-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 5085 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/740/05740436.pdf [firstpage_image] =>[orig_patent_app_number] => 471656 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/471656
System architecture for configuring input and output devices of a computer Jun 5, 1995 Issued
Array ( [id] => 3668033 [patent_doc_number] => 05623676 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-04-22 [patent_title] => 'Computer program product and program storage device for safing asynchronous interrupts' [patent_app_type] => 1 [patent_app_number] => 8/468990 [patent_app_country] => US [patent_app_date] => 1995-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 13 [patent_no_of_words] => 7224 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/623/05623676.pdf [firstpage_image] =>[orig_patent_app_number] => 468990 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/468990
Computer program product and program storage device for safing asynchronous interrupts Jun 5, 1995 Issued
Array ( [id] => 3662396 [patent_doc_number] => 05684966 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-11-04 [patent_title] => 'Method for operating a repeater for distributed arbitration digital data buses' [patent_app_type] => 1 [patent_app_number] => 8/473567 [patent_app_country] => US [patent_app_date] => 1995-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 23667 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 258 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/684/05684966.pdf [firstpage_image] =>[orig_patent_app_number] => 473567 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/473567
Method for operating a repeater for distributed arbitration digital data buses Jun 5, 1995 Issued
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