Patrick G. Wamsley

Array ( [id] => 3870633 [patent_doc_number] => 05706439 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-01-06 [patent_title] => 'Method and system for matching packet size for efficient transmission over a serial bus' [patent_app_type] => 1 [patent_app_number] => 8/313680 [patent_app_country] => US [patent_app_date] => 1994-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 26 [patent_no_of_words] => 9850 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/706/05706439.pdf [firstpage_image] =>[orig_patent_app_number] => 313680 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3636203 [patent_doc_number] => 05613133 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-03-18 [patent_title] => 'Microcode loading with continued program execution' [patent_app_type] => 1 [patent_app_number] => 8/303493 [patent_app_country] => US [patent_app_date] => 1994-09-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3997 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/613/05613133.pdf [firstpage_image] =>[orig_patent_app_number] => 303493 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3595091 [patent_doc_number] => 05581692 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-12-03 [patent_title] => 'Automatic clearing of power supply fault condition in suspend system' [patent_app_type] => 1 [patent_app_number] => 8/303102 [patent_app_country] => US [patent_app_date] => 1994-09-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 52 [patent_figures_cnt] => 54 [patent_no_of_words] => 36824 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 224 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/581/05581692.pdf [firstpage_image] =>[orig_patent_app_number] => 303102 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3638364 [patent_doc_number] => 05608889 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-03-04 [patent_title] => 'DNA controller with wrap-around buffer mode' [patent_app_type] => 1 [patent_app_number] => 8/292339 [patent_app_country] => US [patent_app_date] => 1994-08-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 12595 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 378 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/608/05608889.pdf [firstpage_image] =>[orig_patent_app_number] => 292339 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3745024 [patent_doc_number] => 05694557 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-12-02 [patent_title] => 'Time multiplexing address and data on an existing PC parallel port' [patent_app_type] => 1 [patent_app_number] => 8/288306 [patent_app_country] => US [patent_app_date] => 1994-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 3 [patent_no_of_words] => 2541 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/694/05694557.pdf [firstpage_image] =>[orig_patent_app_number] => 288306 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3523885 [patent_doc_number] => 05564024 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-10-08 [patent_title] => 'Apparatus for connecting and disconnecting peripheral devices to a powered bus' [patent_app_type] => 1 [patent_app_number] => 8/284352 [patent_app_country] => US [patent_app_date] => 1994-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 3483 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 205 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/564/05564024.pdf [firstpage_image] =>[orig_patent_app_number] => 284352 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3566351 [patent_doc_number] => 05519837 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-05-21 [patent_title] => 'Pseudo-round-robin arbitration for a shared resource system providing fairness and high throughput' [patent_app_type] => 1 [patent_app_number] => 8/282332 [patent_app_country] => US [patent_app_date] => 1994-07-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 13 [patent_no_of_words] => 3059 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/519/05519837.pdf [firstpage_image] =>[orig_patent_app_number] => 282332 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3675341 [patent_doc_number] => 05625784 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-04-29 [patent_title] => 'Variable length instructions packed in a fixed length double instruction' [patent_app_type] => 1 [patent_app_number] => 8/281334 [patent_app_country] => US [patent_app_date] => 1994-07-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 3763 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/625/05625784.pdf [firstpage_image] =>[orig_patent_app_number] => 281334 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3785341 [patent_doc_number] => 05734912 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-03-31 [patent_title] => 'Power control apparatus for input/output subsystem' [patent_app_type] => 1 [patent_app_number] => 8/274712 [patent_app_country] => US [patent_app_date] => 1994-07-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3536 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/734/05734912.pdf [firstpage_image] =>[orig_patent_app_number] => 274712 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3708168 [patent_doc_number] => 05596756 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-01-21 [patent_title] => 'Sub-bus activity detection technique for power management within a computer system' [patent_app_type] => 1 [patent_app_number] => 8/274222 [patent_app_country] => US [patent_app_date] => 1994-07-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4518 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 265 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/596/05596756.pdf [firstpage_image] =>[orig_patent_app_number] => 274222 [rel_patent_id] =>[rel_patent_doc_number] =>)