Search

Patrick G. Wamsley

Examiner (ID: 13217)

Most Active Art Unit
2819
Art Unit(s)
2514, 2819, 2753, 2513
Total Applications
980
Issued Applications
852
Pending Applications
37
Abandoned Applications
91

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 1198336 [patent_doc_number] => 06727831 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-04-27 [patent_title] => 'Semiconductor integrated circuit device and data transmission system' [patent_app_type] => B2 [patent_app_number] => 10/377821 [patent_app_country] => US [patent_app_date] => 2003-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 51 [patent_figures_cnt] => 59 [patent_no_of_words] => 20059 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/727/06727831.pdf [firstpage_image] =>[orig_patent_app_number] => 10377821 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/377821
Semiconductor integrated circuit device and data transmission system Mar 3, 2003 Issued
Array ( [id] => 946998 [patent_doc_number] => 06965332 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-11-15 [patent_title] => 'Methods and apparatus for digital offset correction using an ADC with an increased input range' [patent_app_type] => utility [patent_app_number] => 10/376467 [patent_app_country] => US [patent_app_date] => 2003-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 47 [patent_no_of_words] => 7105 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/965/06965332.pdf [firstpage_image] =>[orig_patent_app_number] => 10376467 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/376467
Methods and apparatus for digital offset correction using an ADC with an increased input range Feb 27, 2003 Issued
Array ( [id] => 1047685 [patent_doc_number] => 06864715 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-03-08 [patent_title] => 'Windowing circuit for aligning data and clock signals' [patent_app_type] => utility [patent_app_number] => 10/377461 [patent_app_country] => US [patent_app_date] => 2003-02-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 20 [patent_no_of_words] => 7241 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/864/06864715.pdf [firstpage_image] =>[orig_patent_app_number] => 10377461 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/377461
Windowing circuit for aligning data and clock signals Feb 26, 2003 Issued
Array ( [id] => 1074241 [patent_doc_number] => 06838907 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-01-04 [patent_title] => 'Supplying logic values for sampling on high-speed interfaces' [patent_app_type] => utility [patent_app_number] => 10/376571 [patent_app_country] => US [patent_app_date] => 2003-02-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 2890 [patent_no_of_claims] => 49 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/838/06838907.pdf [firstpage_image] =>[orig_patent_app_number] => 10376571 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/376571
Supplying logic values for sampling on high-speed interfaces Feb 26, 2003 Issued
Array ( [id] => 1160749 [patent_doc_number] => 06765515 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-07-20 [patent_title] => 'Arithmetic coding/decoding apparatus of MQ-Coder system and renormalization method' [patent_app_type] => B2 [patent_app_number] => 10/376069 [patent_app_country] => US [patent_app_date] => 2003-02-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6830 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 506 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/765/06765515.pdf [firstpage_image] =>[orig_patent_app_number] => 10376069 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/376069
Arithmetic coding/decoding apparatus of MQ-Coder system and renormalization method Feb 26, 2003 Issued
Array ( [id] => 1081796 [patent_doc_number] => 06836227 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-12-28 [patent_title] => 'Digitizer module, a waveform generating module, a converting method, a waveform generating method and a recording medium for recording a program thereof' [patent_app_type] => B2 [patent_app_number] => 10/374769 [patent_app_country] => US [patent_app_date] => 2003-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 13109 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/836/06836227.pdf [firstpage_image] =>[orig_patent_app_number] => 10374769 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/374769
Digitizer module, a waveform generating module, a converting method, a waveform generating method and a recording medium for recording a program thereof Feb 24, 2003 Issued
Array ( [id] => 1151818 [patent_doc_number] => 06774676 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-08-10 [patent_title] => 'Dual threshold buffer with hysteresis' [patent_app_type] => B1 [patent_app_number] => 10/374578 [patent_app_country] => US [patent_app_date] => 2003-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3859 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 207 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/774/06774676.pdf [firstpage_image] =>[orig_patent_app_number] => 10374578 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/374578
Dual threshold buffer with hysteresis Feb 23, 2003 Issued
Array ( [id] => 1066942 [patent_doc_number] => 06847318 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-01-25 [patent_title] => 'Method and circuit for regulating the signal level fed to an analog-digital converter' [patent_app_type] => utility [patent_app_number] => 10/372465 [patent_app_country] => US [patent_app_date] => 2003-02-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3645 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/847/06847318.pdf [firstpage_image] =>[orig_patent_app_number] => 10372465 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/372465
Method and circuit for regulating the signal level fed to an analog-digital converter Feb 20, 2003 Issued
Array ( [id] => 6704694 [patent_doc_number] => 20030151428 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-08-14 [patent_title] => '5 Volt tolerant input/output buffer' [patent_app_type] => new [patent_app_number] => 10/364265 [patent_app_country] => US [patent_app_date] => 2003-02-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3381 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0151/20030151428.pdf [firstpage_image] =>[orig_patent_app_number] => 10364265 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/364265
5 Volt tolerant input/output buffer Feb 10, 2003 Abandoned
Array ( [id] => 6820395 [patent_doc_number] => 20030218556 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-11-27 [patent_title] => 'SUBRANGING ANALOG TO DIGITAL CONVERTER WITH MULTI-PHASE CLOCK TIMING' [patent_app_type] => new [patent_app_number] => 10/359201 [patent_app_country] => US [patent_app_date] => 2003-02-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4656 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0218/20030218556.pdf [firstpage_image] =>[orig_patent_app_number] => 10359201 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/359201
Subranging analog to digital converter with multi-phase clock timing Feb 5, 2003 Issued
Array ( [id] => 7261671 [patent_doc_number] => 20040150425 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-08-05 [patent_title] => 'Output signal circuit capable of automatically detecting polarity' [patent_app_type] => new [patent_app_number] => 10/358169 [patent_app_country] => US [patent_app_date] => 2003-02-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2297 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0150/20040150425.pdf [firstpage_image] =>[orig_patent_app_number] => 10358169 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/358169
Output signal circuit capable of automatically detecting polarity Feb 4, 2003 Issued
Array ( [id] => 1114073 [patent_doc_number] => 06803792 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-10-12 [patent_title] => 'Input buffer circuit with constant response speed of output inversion' [patent_app_type] => B2 [patent_app_number] => 10/355167 [patent_app_country] => US [patent_app_date] => 2003-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 4561 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/803/06803792.pdf [firstpage_image] =>[orig_patent_app_number] => 10355167 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/355167
Input buffer circuit with constant response speed of output inversion Jan 30, 2003 Issued
Array ( [id] => 7370893 [patent_doc_number] => 20040027167 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-02-12 [patent_title] => 'Data transfer device for transferring data between blocks of different clock domains' [patent_app_type] => new [patent_app_number] => 10/352164 [patent_app_country] => US [patent_app_date] => 2003-01-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 15420 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 423 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0027/20040027167.pdf [firstpage_image] =>[orig_patent_app_number] => 10352164 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/352164
Data transfer device for transferring data between blocks of different clock domains Jan 27, 2003 Issued
Array ( [id] => 1128969 [patent_doc_number] => 06791355 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-09-14 [patent_title] => 'Spare cell architecture for fixing design errors in manufactured integrated circuits' [patent_app_type] => B2 [patent_app_number] => 10/352470 [patent_app_country] => US [patent_app_date] => 2003-01-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 3121 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/791/06791355.pdf [firstpage_image] =>[orig_patent_app_number] => 10352470 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/352470
Spare cell architecture for fixing design errors in manufactured integrated circuits Jan 26, 2003 Issued
Array ( [id] => 956758 [patent_doc_number] => 06956512 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-10-18 [patent_title] => 'Analog-to-digital converter for programmable logic' [patent_app_type] => utility [patent_app_number] => 10/351076 [patent_app_country] => US [patent_app_date] => 2003-01-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 5046 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/956/06956512.pdf [firstpage_image] =>[orig_patent_app_number] => 10351076 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/351076
Analog-to-digital converter for programmable logic Jan 23, 2003 Issued
Array ( [id] => 7610726 [patent_doc_number] => 06842132 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-01-11 [patent_title] => 'Constant switching for signal processing' [patent_app_type] => utility [patent_app_number] => 10/351470 [patent_app_country] => US [patent_app_date] => 2003-01-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3858 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/842/06842132.pdf [firstpage_image] =>[orig_patent_app_number] => 10351470 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/351470
Constant switching for signal processing Jan 23, 2003 Issued
Array ( [id] => 1247094 [patent_doc_number] => 06677874 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-01-13 [patent_title] => 'Analog-to-digital converter' [patent_app_type] => B1 [patent_app_number] => 10/351267 [patent_app_country] => US [patent_app_date] => 2003-01-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 6158 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 263 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/677/06677874.pdf [firstpage_image] =>[orig_patent_app_number] => 10351267 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/351267
Analog-to-digital converter Jan 22, 2003 Issued
Array ( [id] => 997245 [patent_doc_number] => 06914544 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-07-05 [patent_title] => 'Modulation apparatus and method and DSV control bit generation method' [patent_app_type] => utility [patent_app_number] => 10/471675 [patent_app_country] => US [patent_app_date] => 2003-01-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 13 [patent_no_of_words] => 13419 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 196 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/914/06914544.pdf [firstpage_image] =>[orig_patent_app_number] => 10471675 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/471675
Modulation apparatus and method and DSV control bit generation method Jan 21, 2003 Issued
Array ( [id] => 7632430 [patent_doc_number] => 06664905 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-12-16 [patent_title] => 'Device for encoding n-bit source words into corresponding m-bit channel words and decoding m-bit channel words into corresponding n-bit source words' [patent_app_type] => B1 [patent_app_number] => 10/349237 [patent_app_country] => US [patent_app_date] => 2003-01-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 6355 [patent_no_of_claims] => 44 [patent_no_of_ind_claims] => 15 [patent_words_short_claim] => 4 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/664/06664905.pdf [firstpage_image] =>[orig_patent_app_number] => 10349237 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/349237
Device for encoding n-bit source words into corresponding m-bit channel words and decoding m-bit channel words into corresponding n-bit source words Jan 21, 2003 Issued
Array ( [id] => 6786082 [patent_doc_number] => 20030137321 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-07-24 [patent_title] => 'Logic circuit whose power switch is quickly turned on and off' [patent_app_type] => new [patent_app_number] => 10/347476 [patent_app_country] => US [patent_app_date] => 2003-01-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 15990 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 206 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0137/20030137321.pdf [firstpage_image] =>[orig_patent_app_number] => 10347476 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/347476
Logic circuit whose power switch is quickly turned on and off Jan 20, 2003 Issued
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