Search

Patrick Hamo

Examiner (ID: 2096, Phone: (571)272-3492 , Office: P/3746 )

Most Active Art Unit
3746
Art Unit(s)
3746
Total Applications
1033
Issued Applications
757
Pending Applications
18
Abandoned Applications
258

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 15136237 [patent_doc_number] => 10481584 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-11-19 [patent_title] => System and method for combining frames to generate electrical signals [patent_app_type] => utility [patent_app_number] => 16/053059 [patent_app_country] => US [patent_app_date] => 2018-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3177 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16053059 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/053059
System and method for combining frames to generate electrical signals Aug 1, 2018 Issued
Array ( [id] => 15358831 [patent_doc_number] => 10528029 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-01-07 [patent_title] => System and method to generate sequences of electrical signals [patent_app_type] => utility [patent_app_number] => 16/053053 [patent_app_country] => US [patent_app_date] => 2018-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3178 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16053053 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/053053
System and method to generate sequences of electrical signals Aug 1, 2018 Issued
Array ( [id] => 15074379 [patent_doc_number] => 10466679 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-11-05 [patent_title] => System and method for generating electrical signals [patent_app_type] => utility [patent_app_number] => 16/053039 [patent_app_country] => US [patent_app_date] => 2018-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3177 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16053039 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/053039
System and method for generating electrical signals Aug 1, 2018 Issued
Array ( [id] => 13598695 [patent_doc_number] => 20180350896 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-12-06 [patent_title] => EFFICIENT METAL-INSULATOR-METAL CAPACITOR [patent_app_type] => utility [patent_app_number] => 16/052161 [patent_app_country] => US [patent_app_date] => 2018-08-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4836 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16052161 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/052161
Efficient metal-insulator-metal capacitor Jul 31, 2018 Issued
Array ( [id] => 15443263 [patent_doc_number] => 20200035815 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-01-30 [patent_title] => METHODS OF FABRICATING FIN FIELD EFFECT TRANSISTOR (FINFET) DEVICES USING IMPLANTATIONS ON TOP AND SIDEWALL OF FIN [patent_app_type] => utility [patent_app_number] => 16/048904 [patent_app_country] => US [patent_app_date] => 2018-07-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9320 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16048904 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/048904
Methods of fabricating Fin Field Effect Transistor (FinFET) devices with uniform tension using implantations on top and sidewall of Fin Jul 29, 2018 Issued
Array ( [id] => 15442861 [patent_doc_number] => 20200035614 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-01-30 [patent_title] => PACKAGE STRUCTURE AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 16/048351 [patent_app_country] => US [patent_app_date] => 2018-07-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5899 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16048351 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/048351
PACKAGE STRUCTURE AND MANUFACTURING METHOD THEREOF Jul 29, 2018 Abandoned
Array ( [id] => 15985079 [patent_doc_number] => 10672879 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-06-02 [patent_title] => Method for forming FinFET and gate-all-around FET with selective high-K oxide deposition [patent_app_type] => utility [patent_app_number] => 16/048833 [patent_app_country] => US [patent_app_date] => 2018-07-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 27 [patent_no_of_words] => 8456 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16048833 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/048833
Method for forming FinFET and gate-all-around FET with selective high-K oxide deposition Jul 29, 2018 Issued
Array ( [id] => 13788953 [patent_doc_number] => 20190008015 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-01-03 [patent_title] => ORGANIC EL DISPLAY UNIT, METHOD OF MANUFACTURING THE SAME, AND ELECTRONIC APPARATUS [patent_app_type] => utility [patent_app_number] => 16/048902 [patent_app_country] => US [patent_app_date] => 2018-07-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13339 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16048902 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/048902
Organic EL display unit, method of manufacturing the same, and electronic apparatus Jul 29, 2018 Issued
Array ( [id] => 16068083 [patent_doc_number] => 10693007 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-06-23 [patent_title] => Wrapped contacts with enhanced area [patent_app_type] => utility [patent_app_number] => 16/045905 [patent_app_country] => US [patent_app_date] => 2018-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 12 [patent_no_of_words] => 4472 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16045905 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/045905
Wrapped contacts with enhanced area Jul 25, 2018 Issued
Array ( [id] => 13559213 [patent_doc_number] => 20180331154 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-11-15 [patent_title] => OPTOELECTRONIC DEVICE [patent_app_type] => utility [patent_app_number] => 16/031737 [patent_app_country] => US [patent_app_date] => 2018-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7839 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16031737 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/031737
Optoelectronic units in an optoelectronic device Jul 9, 2018 Issued
Array ( [id] => 15612317 [patent_doc_number] => 10587233 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-03-10 [patent_title] => High power RF switches using multiple optimized transistors and methods for fabricating same [patent_app_type] => utility [patent_app_number] => 16/025996 [patent_app_country] => US [patent_app_date] => 2018-07-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 15 [patent_no_of_words] => 4899 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16025996 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/025996
High power RF switches using multiple optimized transistors and methods for fabricating same Jul 1, 2018 Issued
Array ( [id] => 15015587 [patent_doc_number] => 10453954 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-10-22 [patent_title] => Semiconductor device having trenches in termination structure region thereof and method for manufacturing the same [patent_app_type] => utility [patent_app_number] => 16/022633 [patent_app_country] => US [patent_app_date] => 2018-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 18 [patent_no_of_words] => 8794 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 270 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16022633 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/022633
Semiconductor device having trenches in termination structure region thereof and method for manufacturing the same Jun 27, 2018 Issued
Array ( [id] => 13909505 [patent_doc_number] => 20190043957 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-02-07 [patent_title] => SILICON CARBIDE SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING A SILICON CARBIDE SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 16/022606 [patent_app_country] => US [patent_app_date] => 2018-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7458 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -5 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16022606 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/022606
Silicon carbide semiconductor device and method of manufacturing a silicon carbide semiconductor device Jun 27, 2018 Issued
Array ( [id] => 15476251 [patent_doc_number] => 10554020 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-02-04 [patent_title] => LED with emitted light confined to fewer than ten transverse modes [patent_app_type] => utility [patent_app_number] => 16/022558 [patent_app_country] => US [patent_app_date] => 2018-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 32 [patent_figures_cnt] => 32 [patent_no_of_words] => 12505 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 176 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16022558 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/022558
LED with emitted light confined to fewer than ten transverse modes Jun 27, 2018 Issued
Array ( [id] => 15332193 [patent_doc_number] => 20200006426 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-01-02 [patent_title] => REDUCTION OF METAL RESISTANCE IN VERTICAL RERAM CELLS [patent_app_type] => utility [patent_app_number] => 16/021062 [patent_app_country] => US [patent_app_date] => 2018-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6822 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16021062 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/021062
Fabricating a vertical ReRAM array structure having reduced metal resistance Jun 27, 2018 Issued
Array ( [id] => 13909511 [patent_doc_number] => 20190043960 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-02-07 [patent_title] => MODIFIED FLOATING GATE AND DIELECTRIC LAYER GEOMETRY IN 3D MEMORY ARRAYS [patent_app_type] => utility [patent_app_number] => 16/022540 [patent_app_country] => US [patent_app_date] => 2018-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7534 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16022540 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/022540
Modified floating gate and dielectric layer geometry in 3D memory arrays Jun 27, 2018 Issued
Array ( [id] => 13514577 [patent_doc_number] => 20180308831 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-10-25 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 16/016977 [patent_app_country] => US [patent_app_date] => 2018-06-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8189 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16016977 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/016977
SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE Jun 24, 2018 Abandoned
Array ( [id] => 14738511 [patent_doc_number] => 10388665 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-08-20 [patent_title] => Methods of forming an array of elevationally-extending strings of memory cells having a stack comprising vertically-alternating insulative tiers and wordline tiers and horizontally-elongated trenches in the stack [patent_app_type] => utility [patent_app_number] => 15/992959 [patent_app_country] => US [patent_app_date] => 2018-05-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 22 [patent_no_of_words] => 5658 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15992959 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/992959
Methods of forming an array of elevationally-extending strings of memory cells having a stack comprising vertically-alternating insulative tiers and wordline tiers and horizontally-elongated trenches in the stack May 29, 2018 Issued
Array ( [id] => 14707667 [patent_doc_number] => 10381596 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-08-13 [patent_title] => Organic light-emitting display apparatus with an encapsulation unit [patent_app_type] => utility [patent_app_number] => 15/973289 [patent_app_country] => US [patent_app_date] => 2018-05-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 15203 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 1282 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15973289 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/973289
Organic light-emitting display apparatus with an encapsulation unit May 6, 2018 Issued
Array ( [id] => 13405283 [patent_doc_number] => 20180254184 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-09-06 [patent_title] => NANOWIRE EPITAXY ON A GRAPHITIC SUBSTRATE [patent_app_type] => utility [patent_app_number] => 15/971278 [patent_app_country] => US [patent_app_date] => 2018-05-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8227 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -27 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15971278 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/971278
Compositions comprising epitaxial nanowires on graphene substrates and methods of making thereof May 3, 2018 Issued
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