Search

Patrick Hamo

Examiner (ID: 2096, Phone: (571)272-3492 , Office: P/3746 )

Most Active Art Unit
3746
Art Unit(s)
3746
Total Applications
1033
Issued Applications
757
Pending Applications
18
Abandoned Applications
258

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18959103 [patent_doc_number] => 20240047430 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-08 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/306765 [patent_app_country] => US [patent_app_date] => 2023-04-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7241 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18306765 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/306765
Semiconductor device comprising submodule having at least an upper surface exposed and method of manufacturing the semiconductor device Apr 24, 2023 Issued
Array ( [id] => 20649810 [patent_doc_number] => 12604774 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-04-14 [patent_title] => Electrical connection element and correspond method and apparatus with outgassing grooves that remove trapped gasses [patent_app_type] => utility [patent_app_number] => 18/135828 [patent_app_country] => US [patent_app_date] => 2023-04-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 1142 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18135828 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/135828
Electrical connection element and correspond method and apparatus with outgassing grooves that remove trapped gasses Apr 17, 2023 Issued
Array ( [id] => 19130943 [patent_doc_number] => 20240136296 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-04-25 [patent_title] => POWER MODULE [patent_app_type] => utility [patent_app_number] => 18/134437 [patent_app_country] => US [patent_app_date] => 2023-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5046 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18134437 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/134437
Double-sided cooling power module including reverse-mounted chips Apr 12, 2023 Issued
Array ( [id] => 19130943 [patent_doc_number] => 20240136296 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-04-25 [patent_title] => POWER MODULE [patent_app_type] => utility [patent_app_number] => 18/134437 [patent_app_country] => US [patent_app_date] => 2023-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5046 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18134437 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/134437
Double-sided cooling power module including reverse-mounted chips Apr 12, 2023 Issued
Array ( [id] => 20598231 [patent_doc_number] => 12581971 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-03-17 [patent_title] => Semiconductor device with bridge die electrically connecting two chips and manufacturing method thereof [patent_app_type] => utility [patent_app_number] => 18/191092 [patent_app_country] => US [patent_app_date] => 2023-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 35 [patent_no_of_words] => 3005 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18191092 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/191092
Semiconductor device with bridge die electrically connecting two chips and manufacturing method thereof Mar 27, 2023 Issued
Array ( [id] => 18661212 [patent_doc_number] => 20230307225 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-09-28 [patent_title] => METHOD OF PROCESSING SUBSTRATE, METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE, RECORDING MEDIUM, AND SUBSTRATE PROCESSING APPARATUS [patent_app_type] => utility [patent_app_number] => 18/188077 [patent_app_country] => US [patent_app_date] => 2023-03-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12165 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18188077 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/188077
METHOD OF PROCESSING SUBSTRATE, METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE, RECORDING MEDIUM, AND SUBSTRATE PROCESSING APPARATUS Mar 21, 2023 Pending
Array ( [id] => 18663301 [patent_doc_number] => 20230309327 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-09-28 [patent_title] => MEMRISTOR DEVICE, METHOD OF FABRICATING THE SAME, SYNAPTIC DEVICE INCLUDING THE SAME, AND NEUROMORPHIC DEVICE INCLUDING THE SYNAPTIC DEVICE [patent_app_type] => utility [patent_app_number] => 18/188360 [patent_app_country] => US [patent_app_date] => 2023-03-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8890 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18188360 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/188360
Memristor device, method of fabricating the same, synaptic device including the same, and neuromorphic device including the synaptic device Mar 21, 2023 Issued
Array ( [id] => 18789340 [patent_doc_number] => 20230377997 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-23 [patent_title] => CONTACT FORMATION PROCESS FOR CMOS DEVICES [patent_app_type] => utility [patent_app_number] => 18/123783 [patent_app_country] => US [patent_app_date] => 2023-03-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11979 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18123783 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/123783
CONTACT FORMATION PROCESS FOR CMOS DEVICES Mar 19, 2023 Pending
Array ( [id] => 20720282 [patent_doc_number] => 12635555 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-05-19 [patent_title] => Full AG sinter discrete premium package [patent_app_type] => utility [patent_app_number] => 18/185514 [patent_app_country] => US [patent_app_date] => 2023-03-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 14 [patent_no_of_words] => 1282 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18185514 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/185514
Full AG sinter discrete premium package Mar 16, 2023 Issued
Array ( [id] => 20496917 [patent_doc_number] => 12538811 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-01-27 [patent_title] => Semiconductor device comprising an electrode terminal and an electrode exposed in an opening provided in a mold resin, semiconductor device group comprising an electrode terminal and an electrode exposed in an opening provided in a mold resin, and power conversion apparatus comprising an electrode terminal and an electrode exposed in an opening provided in a mold resin [patent_app_type] => utility [patent_app_number] => 18/185865 [patent_app_country] => US [patent_app_date] => 2023-03-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 26 [patent_no_of_words] => 2177 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18185865 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/185865
Semiconductor device comprising an electrode terminal and an electrode exposed in an opening provided in a mold resin, semiconductor device group comprising an electrode terminal and an electrode exposed in an opening provided in a mold resin, and power conversion apparatus comprising an electrode terminal and an electrode exposed in an opening provided in a mold resin Mar 16, 2023 Issued
Array ( [id] => 18848856 [patent_doc_number] => 20230411260 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-21 [patent_title] => SEMICONDUCTOR MODULE AND METHOD FOR MANUFACTURING SEMICONDUCTOR MODULE [patent_app_type] => utility [patent_app_number] => 18/181618 [patent_app_country] => US [patent_app_date] => 2023-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7487 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -4 [patent_words_short_claim] => 212 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18181618 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/181618
Semiconductor module and method for manufacturing semiconductor module Mar 9, 2023 Issued
Array ( [id] => 18993126 [patent_doc_number] => 20240065095 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-22 [patent_title] => COMPOSITION FOR ELECTRON TRANSPORTING LAYER AND METHOD FOR MANUFACTURING DISPLAY DEVICE INCLUDING THE SAME [patent_app_type] => utility [patent_app_number] => 18/119986 [patent_app_country] => US [patent_app_date] => 2023-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7615 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 20 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18119986 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/119986
COMPOSITION FOR ELECTRON TRANSPORTING LAYER AND METHOD FOR MANUFACTURING DISPLAY DEVICE INCLUDING THE SAME Mar 9, 2023 Pending
Array ( [id] => 19356909 [patent_doc_number] => 12057366 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-08-06 [patent_title] => Semiconductor devices including a lower semiconductor package, an upper semiconductor package on the lower semiconductor package, and a connection pattern between the lower semiconductor package and the upper semiconductor package [patent_app_type] => utility [patent_app_number] => 18/178170 [patent_app_country] => US [patent_app_date] => 2023-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 33 [patent_figures_cnt] => 33 [patent_no_of_words] => 9540 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 195 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18178170 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/178170
Semiconductor devices including a lower semiconductor package, an upper semiconductor package on the lower semiconductor package, and a connection pattern between the lower semiconductor package and the upper semiconductor package Mar 2, 2023 Issued
Array ( [id] => 18473236 [patent_doc_number] => 20230207524 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-29 [patent_title] => SEMICONDUCTOR PACKAGE [patent_app_type] => utility [patent_app_number] => 18/115743 [patent_app_country] => US [patent_app_date] => 2023-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8626 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18115743 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/115743
Semiconductor package including processing element and I/O element Feb 27, 2023 Issued
Array ( [id] => 19392841 [patent_doc_number] => 20240282711 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-22 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 18/112616 [patent_app_country] => US [patent_app_date] => 2023-02-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8289 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18112616 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/112616
Semiconductor device including through-insulator via structure Feb 21, 2023 Issued
Array ( [id] => 20434988 [patent_doc_number] => 12506016 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-12-23 [patent_title] => Method of manufacturing semiconductor device using different types of plating films [patent_app_type] => utility [patent_app_number] => 18/170672 [patent_app_country] => US [patent_app_date] => 2023-02-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 25 [patent_no_of_words] => 3709 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 245 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18170672 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/170672
Method of manufacturing semiconductor device using different types of plating films Feb 16, 2023 Issued
Array ( [id] => 18729371 [patent_doc_number] => 20230343667 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-10-26 [patent_title] => WAFER WARPAGE ADJUSTMENT STRUCTURE AND METHOD FOR MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 18/168633 [patent_app_country] => US [patent_app_date] => 2023-02-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8548 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 208 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18168633 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/168633
Wafer warpage adjustment structure and method for manufacturing the same Feb 13, 2023 Issued
Array ( [id] => 18473160 [patent_doc_number] => 20230207448 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-29 [patent_title] => THREE DIMENSIONAL MIM CAPACITOR HAVING A COMB STRUCTURE AND METHODS OF MAKING THE SAME [patent_app_type] => utility [patent_app_number] => 18/109108 [patent_app_country] => US [patent_app_date] => 2023-02-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8065 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18109108 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/109108
Three dimensional MIM capacitor having a comb structure and methods of making the same Feb 12, 2023 Issued
Array ( [id] => 18456911 [patent_doc_number] => 20230198193 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-22 [patent_title] => SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING SEMICONDUCTOR DEVICES [patent_app_type] => utility [patent_app_number] => 18/108590 [patent_app_country] => US [patent_app_date] => 2023-02-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7777 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18108590 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/108590
Semiconductor devices and methods of manufacturing semiconductor devices Feb 10, 2023 Issued
Array ( [id] => 18533699 [patent_doc_number] => 20230238776 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-07-27 [patent_title] => LED WITH SMALL MESA WIDTH [patent_app_type] => utility [patent_app_number] => 18/165825 [patent_app_country] => US [patent_app_date] => 2023-02-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13129 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -27 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18165825 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/165825
LED with small mesa width Feb 6, 2023 Issued
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