Search

Patrick Hamo

Examiner (ID: 2096, Phone: (571)272-3492 , Office: P/3746 )

Most Active Art Unit
3746
Art Unit(s)
3746
Total Applications
1033
Issued Applications
757
Pending Applications
18
Abandoned Applications
258

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 7777505 [patent_doc_number] => 20120040494 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-02-16 [patent_title] => 'PROCESS FOR PRODUCING PHOTOVOLTAIC DEVICE' [patent_app_type] => utility [patent_app_number] => 13/264277 [patent_app_country] => US [patent_app_date] => 2010-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 8824 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0040/20120040494.pdf [firstpage_image] =>[orig_patent_app_number] => 13264277 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/264277
PROCESS FOR PRODUCING PHOTOVOLTAIC DEVICE Jun 22, 2010 Abandoned
Array ( [id] => 10190442 [patent_doc_number] => 09219876 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2015-12-22 [patent_title] => 'Television monitor and microwave oven combination' [patent_app_type] => utility [patent_app_number] => 12/813576 [patent_app_country] => US [patent_app_date] => 2010-06-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 1209 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 215 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12813576 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/813576
Television monitor and microwave oven combination Jun 10, 2010 Issued
Array ( [id] => 6532912 [patent_doc_number] => 20100270560 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-10-28 [patent_title] => 'SYSTEM AND METHOD FOR EMITTER LAYER SHAPING' [patent_app_type] => utility [patent_app_number] => 12/795484 [patent_app_country] => US [patent_app_date] => 2010-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 13263 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0270/20100270560.pdf [firstpage_image] =>[orig_patent_app_number] => 12795484 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/795484
System and method for emitter layer shaping Jun 6, 2010 Issued
Array ( [id] => 6288612 [patent_doc_number] => 20100238393 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-09-23 [patent_title] => 'SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 12/789382 [patent_app_country] => US [patent_app_date] => 2010-05-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 11266 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0238/20100238393.pdf [firstpage_image] =>[orig_patent_app_number] => 12789382 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/789382
Semiconductor device and manufacturing method thereof May 26, 2010 Issued
Array ( [id] => 9376394 [patent_doc_number] => 08680659 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-03-25 [patent_title] => 'Semiconductor device' [patent_app_type] => utility [patent_app_number] => 13/320528 [patent_app_country] => US [patent_app_date] => 2010-05-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 7645 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 204 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13320528 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/320528
Semiconductor device May 12, 2010 Issued
Array ( [id] => 8270849 [patent_doc_number] => 08212353 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2012-07-03 [patent_title] => 'Structure and assembly procedure for low stress thin die flip chip packages designed for low-K Si and thin core substrate' [patent_app_type] => utility [patent_app_number] => 12/778905 [patent_app_country] => US [patent_app_date] => 2010-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 25 [patent_no_of_words] => 7780 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12778905 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/778905
Structure and assembly procedure for low stress thin die flip chip packages designed for low-K Si and thin core substrate May 11, 2010 Issued
Array ( [id] => 8653473 [patent_doc_number] => 08373223 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-02-12 [patent_title] => 'Semiconductor device and method for fabricating the same' [patent_app_type] => utility [patent_app_number] => 12/772026 [patent_app_country] => US [patent_app_date] => 2010-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 12 [patent_no_of_words] => 3220 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12772026 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/772026
Semiconductor device and method for fabricating the same Apr 29, 2010 Issued
Array ( [id] => 9504251 [patent_doc_number] => 08742569 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-06-03 [patent_title] => 'Semiconductor package configured to electrically couple to a printed circuit board and method of providing same' [patent_app_type] => utility [patent_app_number] => 13/640723 [patent_app_country] => US [patent_app_date] => 2010-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 26 [patent_no_of_words] => 9514 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13640723 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/640723
Semiconductor package configured to electrically couple to a printed circuit board and method of providing same Apr 29, 2010 Issued
Array ( [id] => 8469669 [patent_doc_number] => 08298847 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-10-30 [patent_title] => 'MEMS devices having support structures with substantially vertical sidewalls and methods for fabricating the same' [patent_app_type] => utility [patent_app_number] => 12/766702 [patent_app_country] => US [patent_app_date] => 2010-04-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 50 [patent_no_of_words] => 13653 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12766702 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/766702
MEMS devices having support structures with substantially vertical sidewalls and methods for fabricating the same Apr 22, 2010 Issued
Array ( [id] => 6306200 [patent_doc_number] => 20100192371 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-08-05 [patent_title] => 'Wiring board and method of manufacturing the same, and electronic component device using the wiring board and method of manufacturing the same' [patent_app_type] => utility [patent_app_number] => 12/662300 [patent_app_country] => US [patent_app_date] => 2010-04-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 7179 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0192/20100192371.pdf [firstpage_image] =>[orig_patent_app_number] => 12662300 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/662300
Wiring board and method of manufacturing the same, and electronic component device using the wiring board and method of manufacturing the same Apr 8, 2010 Issued
Array ( [id] => 6424962 [patent_doc_number] => 20100186668 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-07-29 [patent_title] => 'ATOMIC LAYER DEPOSITION SYSTEMS AND METHODS INCLUDING METAL BETA-DIKETIMINATE COMPOUNDS' [patent_app_type] => utility [patent_app_number] => 12/751283 [patent_app_country] => US [patent_app_date] => 2010-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 9498 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0186/20100186668.pdf [firstpage_image] =>[orig_patent_app_number] => 12751283 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/751283
Atomic layer deposition systems and methods including metal beta-diketiminate compounds Mar 30, 2010 Issued
Array ( [id] => 6432683 [patent_doc_number] => 20100187607 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-07-29 [patent_title] => 'LOW COST FABRICATION OF DOUBLE BOX BACK GATE SILICON-ON-INSULATOR WAFERS WITH BUILT-IN SHALLOW TRENCH ISOLATION IN BACK GATE LAYER' [patent_app_type] => utility [patent_app_number] => 12/751302 [patent_app_country] => US [patent_app_date] => 2010-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 3864 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0187/20100187607.pdf [firstpage_image] =>[orig_patent_app_number] => 12751302 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/751302
Low cost fabrication of double box back gate silicon-on-insulator wafers with built-in shallow trench isolation in back gate layer Mar 30, 2010 Issued
Array ( [id] => 8398899 [patent_doc_number] => 08269276 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-09-18 [patent_title] => 'Method for the production of MOS transistors' [patent_app_type] => utility [patent_app_number] => 12/748865 [patent_app_country] => US [patent_app_date] => 2010-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 9 [patent_no_of_words] => 1659 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12748865 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/748865
Method for the production of MOS transistors Mar 28, 2010 Issued
Array ( [id] => 6508263 [patent_doc_number] => 20100216271 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-08-26 [patent_title] => 'METHOD FOR FABRICATING LIGHT EMITTING DEVICE' [patent_app_type] => utility [patent_app_number] => 12/712584 [patent_app_country] => US [patent_app_date] => 2010-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4044 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0216/20100216271.pdf [firstpage_image] =>[orig_patent_app_number] => 12712584 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/712584
Method for fabricating light emitting device Feb 24, 2010 Issued
Array ( [id] => 6047733 [patent_doc_number] => 20110207279 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-08-25 [patent_title] => 'INTEGRATED METHOD FOR FORMING HIGH-K METAL GATE FINFET DEVICES' [patent_app_type] => utility [patent_app_number] => 12/712594 [patent_app_country] => US [patent_app_date] => 2010-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3692 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0207/20110207279.pdf [firstpage_image] =>[orig_patent_app_number] => 12712594 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/712594
Integrated method for forming high-k metal gate FinFET devices Feb 24, 2010 Issued
Array ( [id] => 8549210 [patent_doc_number] => 08324091 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-12-04 [patent_title] => 'Enhancing integrity of a high-k gate stack by confining a metal cap layer after deposition' [patent_app_type] => utility [patent_app_number] => 12/711481 [patent_app_country] => US [patent_app_date] => 2010-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 15 [patent_no_of_words] => 7580 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12711481 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/711481
Enhancing integrity of a high-k gate stack by confining a metal cap layer after deposition Feb 23, 2010 Issued
Array ( [id] => 7496441 [patent_doc_number] => 20110259881 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-10-27 [patent_title] => 'Microwave Pressure Cooker' [patent_app_type] => utility [patent_app_number] => 12/809746 [patent_app_country] => US [patent_app_date] => 2010-02-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 5778 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0259/20110259881.pdf [firstpage_image] =>[orig_patent_app_number] => 12809746 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/809746
Microwave pressure cooker Feb 21, 2010 Issued
Array ( [id] => 8457988 [patent_doc_number] => 08293653 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-10-23 [patent_title] => 'Method of manufacturing a semiconductor device' [patent_app_type] => utility [patent_app_number] => 12/656981 [patent_app_country] => US [patent_app_date] => 2010-02-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 16 [patent_no_of_words] => 4078 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12656981 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/656981
Method of manufacturing a semiconductor device Feb 21, 2010 Issued
Array ( [id] => 4513913 [patent_doc_number] => 07910401 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-03-22 [patent_title] => 'Organic thin film transistor, flat panel display apparatus comprising the same, and method of manufacturing the organic thin film transistor' [patent_app_type] => utility [patent_app_number] => 12/706836 [patent_app_country] => US [patent_app_date] => 2010-02-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 11 [patent_no_of_words] => 5280 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/910/07910401.pdf [firstpage_image] =>[orig_patent_app_number] => 12706836 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/706836
Organic thin film transistor, flat panel display apparatus comprising the same, and method of manufacturing the organic thin film transistor Feb 16, 2010 Issued
Array ( [id] => 8533901 [patent_doc_number] => 08310058 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-11-13 [patent_title] => 'Semiconductor device and method for forming passive circuit elements with through silicon vias to backside interconnect structures' [patent_app_type] => utility [patent_app_number] => 12/704366 [patent_app_country] => US [patent_app_date] => 2010-02-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 15 [patent_no_of_words] => 5124 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12704366 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/704366
Semiconductor device and method for forming passive circuit elements with through silicon vias to backside interconnect structures Feb 10, 2010 Issued
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