Search

Patrick Hamo

Examiner (ID: 2096, Phone: (571)272-3492 , Office: P/3746 )

Most Active Art Unit
3746
Art Unit(s)
3746
Total Applications
1033
Issued Applications
757
Pending Applications
18
Abandoned Applications
258

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 17871026 [patent_doc_number] => 20220293763 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-15 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/652749 [patent_app_country] => US [patent_app_date] => 2022-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4737 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -5 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17652749 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/652749
Semiconductor device having nickel oxide film on gate electrode Feb 27, 2022 Issued
Array ( [id] => 17833576 [patent_doc_number] => 20220270880 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-08-25 [patent_title] => METHOD OF FORMING THE SPACERS OF A TRANSISTOR GATE [patent_app_type] => utility [patent_app_number] => 17/652324 [patent_app_country] => US [patent_app_date] => 2022-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7134 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17652324 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/652324
Method of forming the spacers on lateral flanks of a transistor gate using successive implantation phases Feb 23, 2022 Issued
Array ( [id] => 19842977 [patent_doc_number] => 12255381 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-03-18 [patent_title] => Antenna modules employing three-dimensional (3D) build-up on mold package to support efficient integration of radio-frequency (RF) circuitry, and related fabrication methods [patent_app_type] => utility [patent_app_number] => 17/652328 [patent_app_country] => US [patent_app_date] => 2022-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 22 [patent_no_of_words] => 13643 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 205 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17652328 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/652328
Antenna modules employing three-dimensional (3D) build-up on mold package to support efficient integration of radio-frequency (RF) circuitry, and related fabrication methods Feb 23, 2022 Issued
Array ( [id] => 18761582 [patent_doc_number] => 11812636 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-11-07 [patent_title] => Organic light emitting diode having overcoat layer and organic light emitting device including the same [patent_app_type] => utility [patent_app_number] => 17/678973 [patent_app_country] => US [patent_app_date] => 2022-02-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 7941 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17678973 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/678973
Organic light emitting diode having overcoat layer and organic light emitting device including the same Feb 22, 2022 Issued
Array ( [id] => 18570454 [patent_doc_number] => 20230260791 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-08-17 [patent_title] => INTEGRATED DIPOLE REGION FOR TRANSISTOR [patent_app_type] => utility [patent_app_number] => 17/673905 [patent_app_country] => US [patent_app_date] => 2022-02-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8736 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17673905 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/673905
Integrated dipole region for transistor Feb 16, 2022 Issued
Array ( [id] => 17795610 [patent_doc_number] => 20220254702 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-08-11 [patent_title] => SEMICONDUCTOR APPARATUS WITH HEAT DISSIPATION CONDUIT IN SIDEWALL INTERCONNECTION STRUCTURE, METHOD OF MANUFACTURING THE SAME, AND ELECTRONIC DEVICE [patent_app_type] => utility [patent_app_number] => 17/666790 [patent_app_country] => US [patent_app_date] => 2022-02-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12561 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17666790 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/666790
Semiconductor apparatus with heat dissipation conduit in sidewall interconnection structure, method of manufacturing the same, and electronic device Feb 7, 2022 Issued
Array ( [id] => 18919117 [patent_doc_number] => 11881405 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-01-23 [patent_title] => Methods for forming N-type buried layer in a substrate by performing non-doping implant through oxide layer formed over the substrate [patent_app_type] => utility [patent_app_number] => 17/592617 [patent_app_country] => US [patent_app_date] => 2022-02-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 3633 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17592617 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/592617
Methods for forming N-type buried layer in a substrate by performing non-doping implant through oxide layer formed over the substrate Feb 3, 2022 Issued
Array ( [id] => 19842876 [patent_doc_number] => 12255279 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-03-18 [patent_title] => Light-emitting diode package structure and manufacturing method thereof [patent_app_type] => utility [patent_app_number] => 17/583222 [patent_app_country] => US [patent_app_date] => 2022-01-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4207 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17583222 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/583222
Light-emitting diode package structure and manufacturing method thereof Jan 24, 2022 Issued
Array ( [id] => 17599338 [patent_doc_number] => 20220148912 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-05-12 [patent_title] => Through Wafer Trench Isolation and Capacitive Coupling [patent_app_type] => utility [patent_app_number] => 17/583322 [patent_app_country] => US [patent_app_date] => 2022-01-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6013 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 168 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17583322 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/583322
Through wafer trench isolation between transistors in an integrated circuit Jan 24, 2022 Issued
Array ( [id] => 19509433 [patent_doc_number] => 12120874 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-10-15 [patent_title] => Semiconductor devices having separation regions in gate electrode layers, and data storage systems including the same [patent_app_type] => utility [patent_app_number] => 17/583265 [patent_app_country] => US [patent_app_date] => 2022-01-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 23 [patent_no_of_words] => 11493 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 177 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17583265 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/583265
Semiconductor devices having separation regions in gate electrode layers, and data storage systems including the same Jan 24, 2022 Issued
Array ( [id] => 18782230 [patent_doc_number] => 11823996 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-11-21 [patent_title] => Power semiconductor module for improved heat dissipation and power density, and method for manufacturing the same [patent_app_type] => utility [patent_app_number] => 17/581412 [patent_app_country] => US [patent_app_date] => 2022-01-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 12 [patent_no_of_words] => 5534 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17581412 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/581412
Power semiconductor module for improved heat dissipation and power density, and method for manufacturing the same Jan 20, 2022 Issued
Array ( [id] => 18645586 [patent_doc_number] => 11769664 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-09-26 [patent_title] => Methods for depositing a hafnium lanthanum oxide film on a substrate by a cyclical deposition process in a reaction chamber [patent_app_type] => utility [patent_app_number] => 17/577073 [patent_app_country] => US [patent_app_date] => 2022-01-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 11160 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17577073 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/577073
Methods for depositing a hafnium lanthanum oxide film on a substrate by a cyclical deposition process in a reaction chamber Jan 16, 2022 Issued
Array ( [id] => 18500548 [patent_doc_number] => 20230223342 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-07-13 [patent_title] => CONDUCTIVE LAYER STACK AND SEMICONDUCTOR DEVICE WITH A GATE CONTACT [patent_app_type] => utility [patent_app_number] => 17/573781 [patent_app_country] => US [patent_app_date] => 2022-01-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8469 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 53 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17573781 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/573781
Conductive layer stack and semiconductor device with a gate contact Jan 11, 2022 Issued
Array ( [id] => 18473210 [patent_doc_number] => 20230207498 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-29 [patent_title] => High Dielectric Constant Carrier Based Packaging with Enhanced WG Matching for 5G and 6G Applications [patent_app_type] => utility [patent_app_number] => 17/564687 [patent_app_country] => US [patent_app_date] => 2021-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13590 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 207 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17564687 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/564687
High dielectric constant carrier based packaging with enhanced WG matching for 5G and 6G applications Dec 28, 2021 Issued
Array ( [id] => 17709116 [patent_doc_number] => 20220209124 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-30 [patent_title] => ORGANIC DEVICE, GROUP OF MASKS, MASK, AND MANUFACTURING METHOD FOR ORGANIC DEVICE [patent_app_type] => utility [patent_app_number] => 17/646052 [patent_app_country] => US [patent_app_date] => 2021-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 37451 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17646052 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/646052
Organic device having a first display area, and a second display area including a second electrode surrounding each of first and second adjacent transmission areas Dec 26, 2021 Issued
Array ( [id] => 18473203 [patent_doc_number] => 20230207491 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-29 [patent_title] => RECTILINEAR SEAMS BETWEEN ADJACENT FIELDS OF A DIE FOR IMPROVED LAYOUT EFFICIENCY [patent_app_type] => utility [patent_app_number] => 17/561353 [patent_app_country] => US [patent_app_date] => 2021-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11968 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17561353 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/561353
Rectilinear seams between adjacent fields of a die for improved layout efficiency Dec 22, 2021 Issued
Array ( [id] => 19640503 [patent_doc_number] => 12171129 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-12-17 [patent_title] => Redlined title: display device having display area including transmissive area and a non-transmissive area [patent_app_type] => utility [patent_app_number] => 17/560094 [patent_app_country] => US [patent_app_date] => 2021-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 12390 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 205 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17560094 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/560094
Redlined title: display device having display area including transmissive area and a non-transmissive area Dec 21, 2021 Issued
Array ( [id] => 19640503 [patent_doc_number] => 12171129 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-12-17 [patent_title] => Redlined title: display device having display area including transmissive area and a non-transmissive area [patent_app_type] => utility [patent_app_number] => 17/560094 [patent_app_country] => US [patent_app_date] => 2021-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 12390 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 205 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17560094 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/560094
Redlined title: display device having display area including transmissive area and a non-transmissive area Dec 21, 2021 Issued
Array ( [id] => 19640503 [patent_doc_number] => 12171129 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-12-17 [patent_title] => Redlined title: display device having display area including transmissive area and a non-transmissive area [patent_app_type] => utility [patent_app_number] => 17/560094 [patent_app_country] => US [patent_app_date] => 2021-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 12390 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 205 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17560094 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/560094
Redlined title: display device having display area including transmissive area and a non-transmissive area Dec 21, 2021 Issued
Array ( [id] => 19640503 [patent_doc_number] => 12171129 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-12-17 [patent_title] => Redlined title: display device having display area including transmissive area and a non-transmissive area [patent_app_type] => utility [patent_app_number] => 17/560094 [patent_app_country] => US [patent_app_date] => 2021-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 12390 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 205 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17560094 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/560094
Redlined title: display device having display area including transmissive area and a non-transmissive area Dec 21, 2021 Issued
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