Patrick Hamo

Array ( [id] => 5125951 [patent_doc_number] => 20070238222 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-10-11 [patent_title] => 'Apparatuses and methods to enhance passivation and ILD reliability' [patent_app_type] => utility [patent_app_number] => 11/392270 [patent_app_country] => US [patent_app_date] => 2006-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4046 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0238/20070238222.pdf [firstpage_image] =>[orig_patent_app_number] => 11392270 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5868957 [patent_doc_number] => 20060163574 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-07-27 [patent_title] => 'Semiconductor device and manufacturing method thereof' [patent_app_type] => utility [patent_app_number] => 11/387800 [patent_app_country] => US [patent_app_date] => 2006-03-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 11267 [patent_no_of_claims] => 112 [patent_no_of_ind_claims] => 20 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0163/20060163574.pdf [firstpage_image] =>[orig_patent_app_number] => 11387800 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 807311 [patent_doc_number] => 07420263 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-09-02 [patent_title] => 'DBG system and method with adhesive layer severing' [patent_app_type] => utility [patent_app_number] => 11/374377 [patent_app_country] => US [patent_app_date] => 2006-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 16 [patent_no_of_words] => 2229 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/420/07420263.pdf [firstpage_image] =>[orig_patent_app_number] => 11374377 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 141886 [patent_doc_number] => 07691683 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-04-06 [patent_title] => 'Electrode structures and method to form electrode structures that minimize electrode work function variation' [patent_app_type] => utility [patent_app_number] => 11/368455 [patent_app_country] => US [patent_app_date] => 2006-03-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 12 [patent_no_of_words] => 3204 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/691/07691683.pdf [firstpage_image] =>[orig_patent_app_number] => 11368455 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 443766 [patent_doc_number] => 07256503 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-08-14 [patent_title] => 'Chip underfill in flip-chip technologies' [patent_app_type] => utility [patent_app_number] => 11/276380 [patent_app_country] => US [patent_app_date] => 2006-02-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 2378 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 197 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/256/07256503.pdf [firstpage_image] =>[orig_patent_app_number] => 11276380 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5104307 [patent_doc_number] => 20070063182 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-03-22 [patent_title] => 'ENHANCEMENT MODE SINGLE ELECTRON TRANSISTOR' [patent_app_type] => utility [patent_app_number] => 11/307830 [patent_app_country] => US [patent_app_date] => 2006-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3708 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0063/20070063182.pdf [firstpage_image] =>[orig_patent_app_number] => 11307830 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 196642 [patent_doc_number] => 07635920 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-12-22 [patent_title] => 'Method and apparatus for indicating directionality in integrated circuit manufacturing' [patent_app_type] => utility [patent_app_number] => 11/360925 [patent_app_country] => US [patent_app_date] => 2006-02-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 6505 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 30 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/635/07635920.pdf [firstpage_image] =>[orig_patent_app_number] => 11360925 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5113109 [patent_doc_number] => 20070197024 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-08-23 [patent_title] => 'Interconnect structure and method for semiconductor device' [patent_app_type] => utility [patent_app_number] => 11/356146 [patent_app_country] => US [patent_app_date] => 2006-02-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2185 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0197/20070197024.pdf [firstpage_image] =>[orig_patent_app_number] => 11356146 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 573934 [patent_doc_number] => 07462899 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-12-09 [patent_title] => 'Semiconductor memory device having local etch stopper and method of manufacturing the same' [patent_app_type] => utility [patent_app_number] => 11/354175 [patent_app_country] => US [patent_app_date] => 2006-02-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 12 [patent_no_of_words] => 3388 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 178 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/462/07462899.pdf [firstpage_image] =>[orig_patent_app_number] => 11354175 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 592989 [patent_doc_number] => 07436061 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-10-14 [patent_title] => 'Semiconductor device, electronic device, electronic apparatus, and method of manufacturing semiconductor device' [patent_app_type] => utility [patent_app_number] => 11/356280 [patent_app_country] => US [patent_app_date] => 2006-02-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 7099 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/436/07436061.pdf [firstpage_image] =>[orig_patent_app_number] => 11356280 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 579552 [patent_doc_number] => 07452822 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-11-18 [patent_title] => 'Via plug formation in dual damascene process' [patent_app_type] => utility [patent_app_number] => 11/352815 [patent_app_country] => US [patent_app_date] => 2006-02-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 3654 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/452/07452822.pdf [firstpage_image] =>[orig_patent_app_number] => 11352815 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 443662 [patent_doc_number] => 07256448 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-08-14 [patent_title] => 'Split gate type nonvolatile semiconductor memory device, and method of fabricating the same' [patent_app_type] => utility [patent_app_number] => 11/349402 [patent_app_country] => US [patent_app_date] => 2006-02-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 21 [patent_no_of_words] => 6604 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/256/07256448.pdf [firstpage_image] =>[orig_patent_app_number] => 11349402 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 887941 [patent_doc_number] => 07348244 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-03-25 [patent_title] => 'Method of producing a semiconductor device' [patent_app_type] => utility [patent_app_number] => 11/345310 [patent_app_country] => US [patent_app_date] => 2006-02-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 29 [patent_no_of_words] => 12088 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 282 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/348/07348244.pdf [firstpage_image] =>[orig_patent_app_number] => 11345310 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5843676 [patent_doc_number] => 20060121747 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-06-08 [patent_title] => 'Ink-jet printhead fabrication' [patent_app_type] => utility [patent_app_number] => 11/341101 [patent_app_country] => US [patent_app_date] => 2006-01-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 3691 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0121/20060121747.pdf [firstpage_image] =>[orig_patent_app_number] => 11341101 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5664762 [patent_doc_number] => 20060170112 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-08-03 [patent_title] => 'Semiconductor device and method of manufacturing thereof' [patent_app_type] => utility [patent_app_number] => 11/329600 [patent_app_country] => US [patent_app_date] => 2006-01-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 32 [patent_figures_cnt] => 32 [patent_no_of_words] => 18789 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0170/20060170112.pdf [firstpage_image] =>[orig_patent_app_number] => 11329600 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5611695 [patent_doc_number] => 20060113621 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-06-01 [patent_title] => 'Methods for aligning semiconductor fabrication molds and semiconductor substrates' [patent_app_type] => utility [patent_app_number] => 11/327216 [patent_app_country] => US [patent_app_date] => 2006-01-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5751 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0113/20060113621.pdf [firstpage_image] =>[orig_patent_app_number] => 11327216 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5705356 [patent_doc_number] => 20060194404 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-08-31 [patent_title] => 'Method and system for fabricating and cleaning free-standing nanostructures' [patent_app_type] => utility [patent_app_number] => 11/325631 [patent_app_country] => US [patent_app_date] => 2006-01-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6742 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0194/20060194404.pdf [firstpage_image] =>[orig_patent_app_number] => 11325631 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5104360 [patent_doc_number] => 20070063235 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-03-22 [patent_title] => 'CMOS image sensor and method of manufacturing the same' [patent_app_type] => utility [patent_app_number] => 11/320680 [patent_app_country] => US [patent_app_date] => 2005-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 3619 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0063/20070063235.pdf [firstpage_image] =>[orig_patent_app_number] => 11320680 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5107152 [patent_doc_number] => 20070066030 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-03-22 [patent_title] => 'METHOD OF MANUFACTURING AN ISOLATION LAYER OF A FLASH MEMORY' [patent_app_type] => utility [patent_app_number] => 11/320580 [patent_app_country] => US [patent_app_date] => 2005-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3049 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0066/20070066030.pdf [firstpage_image] =>[orig_patent_app_number] => 11320580 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 504865 [patent_doc_number] => 07202158 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-04-10 [patent_title] => 'Method for fabricating a metal-insulator-metal capacitor' [patent_app_type] => utility [patent_app_number] => 11/320590 [patent_app_country] => US [patent_app_date] => 2005-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 1402 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/202/07202158.pdf [firstpage_image] =>[orig_patent_app_number] => 11320590 [rel_patent_id] =>[rel_patent_doc_number] =>)