
Patrick Hamo
Examiner (ID: 2096, Phone: (571)272-3492 , Office: P/3746 )
| Most Active Art Unit | 3746 |
| Art Unit(s) | 3746 |
| Total Applications | 1033 |
| Issued Applications | 757 |
| Pending Applications | 18 |
| Abandoned Applications | 258 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 7349042
[patent_doc_number] => 20040248368
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-12-09
[patent_title] => 'MOSFET DEVICE WITH IN-SITU DOPED, RAISED SOURCE AND DRAIN STRUCTURES'
[patent_app_type] => new
[patent_app_number] => 10/881449
[patent_app_country] => US
[patent_app_date] => 2004-06-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 13
[patent_no_of_words] => 10829
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 3
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0248/20040248368.pdf
[firstpage_image] =>[orig_patent_app_number] => 10881449
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/881449 | MOSFET device with in-situ doped, raised source and drain structures | Jun 29, 2004 | Issued |
Array
(
[id] => 1053160
[patent_doc_number] => 06858488
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2005-02-22
[patent_title] => 'CMOS performance enhancement using localized voids and extended defects'
[patent_app_type] => utility
[patent_app_number] => 10/879550
[patent_app_country] => US
[patent_app_date] => 2004-06-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 12
[patent_no_of_words] => 2379
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 81
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/858/06858488.pdf
[firstpage_image] =>[orig_patent_app_number] => 10879550
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/879550 | CMOS performance enhancement using localized voids and extended defects | Jun 28, 2004 | Issued |
Array
(
[id] => 1031424
[patent_doc_number] => 06878978
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2005-04-12
[patent_title] => 'CMOS performance enhancement using localized voids and extended defects'
[patent_app_type] => utility
[patent_app_number] => 10/879538
[patent_app_country] => US
[patent_app_date] => 2004-06-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 12
[patent_no_of_words] => 2379
[patent_no_of_claims] => 3
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 84
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/878/06878978.pdf
[firstpage_image] =>[orig_patent_app_number] => 10879538
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/879538 | CMOS performance enhancement using localized voids and extended defects | Jun 28, 2004 | Issued |
Array
(
[id] => 7272863
[patent_doc_number] => 20040232314
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-11-25
[patent_title] => 'CMOS image sensor and method of fabrication'
[patent_app_type] => new
[patent_app_number] => 10/875185
[patent_app_country] => US
[patent_app_date] => 2004-06-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 15
[patent_no_of_words] => 4270
[patent_no_of_claims] => 31
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 3
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0232/20040232314.pdf
[firstpage_image] =>[orig_patent_app_number] => 10875185
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/875185 | CMOS image sensor and method of fabrication | Jun 24, 2004 | Issued |
Array
(
[id] => 7429193
[patent_doc_number] => 20040266066
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-12-30
[patent_title] => 'Bump structure of a semiconductor wafer and manufacturing method thereof'
[patent_app_type] => new
[patent_app_number] => 10/874239
[patent_app_country] => US
[patent_app_date] => 2004-06-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 3062
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 88
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0266/20040266066.pdf
[firstpage_image] =>[orig_patent_app_number] => 10874239
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/874239 | Bump structure of a semiconductor wafer and manufacturing method thereof | Jun 23, 2004 | Abandoned |
Array
(
[id] => 944349
[patent_doc_number] => 06967403
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2005-11-22
[patent_title] => 'Package structure with a heat spreader and manufacturing method thereof'
[patent_app_type] => utility
[patent_app_number] => 10/872190
[patent_app_country] => US
[patent_app_date] => 2004-06-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 11
[patent_no_of_words] => 2772
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 99
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/967/06967403.pdf
[firstpage_image] =>[orig_patent_app_number] => 10872190
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/872190 | Package structure with a heat spreader and manufacturing method thereof | Jun 17, 2004 | Issued |
Array
(
[id] => 7317912
[patent_doc_number] => 20040224495
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-11-11
[patent_title] => 'Localized doping and /or alloying of metallization for increased interconnect performance'
[patent_app_type] => new
[patent_app_number] => 10/870356
[patent_app_country] => US
[patent_app_date] => 2004-06-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 5544
[patent_no_of_claims] => 25
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 47
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0224/20040224495.pdf
[firstpage_image] =>[orig_patent_app_number] => 10870356
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/870356 | Localized doping and /or alloying of metallization for increased interconnect performance | Jun 16, 2004 | Abandoned |
Array
(
[id] => 7253020
[patent_doc_number] => 20040259325
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-12-23
[patent_title] => 'Wafer level chip scale hermetic package'
[patent_app_type] => new
[patent_app_number] => 10/870609
[patent_app_country] => US
[patent_app_date] => 2004-06-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 3588
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 77
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0259/20040259325.pdf
[firstpage_image] =>[orig_patent_app_number] => 10870609
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/870609 | Wafer level chip scale hermetic package | Jun 16, 2004 | Abandoned |
Array
(
[id] => 7338690
[patent_doc_number] => 20040245644
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-12-09
[patent_title] => 'Low K film application for interlevel dielectric and method of cleaning etched features'
[patent_app_type] => new
[patent_app_number] => 10/870216
[patent_app_country] => US
[patent_app_date] => 2004-06-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 3965
[patent_no_of_claims] => 35
[patent_no_of_ind_claims] => 27
[patent_words_short_claim] => 3
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0245/20040245644.pdf
[firstpage_image] =>[orig_patent_app_number] => 10870216
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/870216 | Low K film application for interlevel dielectric and method of cleaning etched features | Jun 16, 2004 | Abandoned |
Array
(
[id] => 7056032
[patent_doc_number] => 20050277207
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-12-15
[patent_title] => 'MASK SCHEMES FOR PATTERNING MAGNETIC TUNNEL JUNCTIONS'
[patent_app_type] => utility
[patent_app_number] => 10/868328
[patent_app_country] => US
[patent_app_date] => 2004-06-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 7764
[patent_no_of_claims] => 45
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0277/20050277207.pdf
[firstpage_image] =>[orig_patent_app_number] => 10868328
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/868328 | Mask schemes for patterning magnetic tunnel junctions | Jun 14, 2004 | Issued |
Array
(
[id] => 7056111
[patent_doc_number] => 20050277286
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-12-15
[patent_title] => 'Metallic glass microtool'
[patent_app_type] => utility
[patent_app_number] => 10/868440
[patent_app_country] => US
[patent_app_date] => 2004-06-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 4169
[patent_no_of_claims] => 27
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0277/20050277286.pdf
[firstpage_image] =>[orig_patent_app_number] => 10868440
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/868440 | Metallic glass microtool | Jun 13, 2004 | Abandoned |
Array
(
[id] => 7253128
[patent_doc_number] => 20040259345
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-12-23
[patent_title] => 'Formation method of conductive bump'
[patent_app_type] => new
[patent_app_number] => 10/864338
[patent_app_country] => US
[patent_app_date] => 2004-06-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
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[patent_no_of_words] => 1892
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0259/20040259345.pdf
[firstpage_image] =>[orig_patent_app_number] => 10864338
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/864338 | Formation method of conductive bump | Jun 9, 2004 | Abandoned |
Array
(
[id] => 7122506
[patent_doc_number] => 20050014335
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-01-20
[patent_title] => 'Method for fabricating a memory cell'
[patent_app_type] => utility
[patent_app_number] => 10/862818
[patent_app_country] => US
[patent_app_date] => 2004-06-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
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[patent_no_of_words] => 2303
[patent_no_of_claims] => 22
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0014/20050014335.pdf
[firstpage_image] =>[orig_patent_app_number] => 10862818
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/862818 | Method for fabricating a memory cell | Jun 6, 2004 | Issued |
Array
(
[id] => 7248114
[patent_doc_number] => 20050272235
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-12-08
[patent_title] => 'Method of forming silicided gate structure'
[patent_app_type] => utility
[patent_app_number] => 10/859730
[patent_app_country] => US
[patent_app_date] => 2004-06-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
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[patent_no_of_words] => 3098
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 7
[patent_words_short_claim] => 0
[patent_maintenance] => 1
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0272/20050272235.pdf
[firstpage_image] =>[orig_patent_app_number] => 10859730
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/859730 | Method of forming silicided gate structure | Jun 2, 2004 | Issued |
Array
(
[id] => 982335
[patent_doc_number] => 06927179
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2005-08-09
[patent_title] => 'Methods and apparatus for forming a high dielectric film and the dielectric film formed thereby'
[patent_app_type] => utility
[patent_app_number] => 10/910229
[patent_app_country] => US
[patent_app_date] => 2004-06-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
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[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/927/06927179.pdf
[firstpage_image] =>[orig_patent_app_number] => 10910229
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/910229 | Methods and apparatus for forming a high dielectric film and the dielectric film formed thereby | Jun 2, 2004 | Issued |
Array
(
[id] => 7080488
[patent_doc_number] => 20050045868
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-03-03
[patent_title] => 'Optical semiconductor device and method for fabricating the same'
[patent_app_type] => utility
[patent_app_number] => 10/857920
[patent_app_country] => US
[patent_app_date] => 2004-06-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
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[patent_no_of_words] => 4648
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0045/20050045868.pdf
[firstpage_image] =>[orig_patent_app_number] => 10857920
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/857920 | Optical semiconductor device and method for fabricating the same | Jun 1, 2004 | Issued |
Array
(
[id] => 7317945
[patent_doc_number] => 20040224507
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-11-11
[patent_title] => 'Copper alloys for interconnections having improved electromigration characteristics and methods of making same'
[patent_app_type] => new
[patent_app_number] => 10/860428
[patent_app_country] => US
[patent_app_date] => 2004-06-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0224/20040224507.pdf
[firstpage_image] =>[orig_patent_app_number] => 10860428
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/860428 | Copper alloys for interconnections having improved electromigration characteristics and methods of making same | Jun 1, 2004 | Issued |
Array
(
[id] => 7376000
[patent_doc_number] => 20040219788
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-11-04
[patent_title] => 'Copper alloys for interconnections having improved electromigration characteristics and methods of making same'
[patent_app_type] => new
[patent_app_number] => 10/859327
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0219/20040219788.pdf
[firstpage_image] =>[orig_patent_app_number] => 10859327
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/859327 | Copper alloys for interconnections having improved electromigration characteristics and methods of making same | May 31, 2004 | Issued |
Array
(
[id] => 7275786
[patent_doc_number] => 20040235237
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-11-25
[patent_title] => 'Semiconductor device and method for manufacturing the same'
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[patent_app_number] => 10/479429
[patent_app_country] => US
[patent_app_date] => 2004-05-27
[patent_effective_date] => 0000-00-00
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0235/20040235237.pdf
[firstpage_image] =>[orig_patent_app_number] => 10479429
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/479429 | Semiconductor device and method for manufacturing the same | May 26, 2004 | Abandoned |
Array
(
[id] => 7086672
[patent_doc_number] => 20050006784
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-01-13
[patent_title] => 'Semiconductor device, electronic device, electronic apparatus, and method of manufacturing semiconductor device'
[patent_app_type] => utility
[patent_app_number] => 10/852860
[patent_app_country] => US
[patent_app_date] => 2004-05-25
[patent_effective_date] => 0000-00-00
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[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0006/20050006784.pdf
[firstpage_image] =>[orig_patent_app_number] => 10852860
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/852860 | Semiconductor device, electronic device, electronic apparatus, and method of manufacturing semiconductor device | May 24, 2004 | Issued |