Search

Patrick J. King

Examiner (ID: 2754, Phone: (571)272-3439 , Office: P/2853 )

Most Active Art Unit
2853
Art Unit(s)
2861, 2853
Total Applications
277
Issued Applications
233
Pending Applications
0
Abandoned Applications
43

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19515653 [patent_doc_number] => 20240347339 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-17 [patent_title] => COMPOSITE SUBSTRATE FOR FABRICATION OF BETA GALLIUM OXIDE DEVICES [patent_app_type] => utility [patent_app_number] => 18/301493 [patent_app_country] => US [patent_app_date] => 2023-04-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5132 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 43 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18301493 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/301493
COMPOSITE SUBSTRATE FOR FABRICATION OF BETA GALLIUM OXIDE DEVICES Apr 16, 2023 Pending
Array ( [id] => 18898669 [patent_doc_number] => 20240014154 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-11 [patent_title] => SEMICONDUCTOR DEVICE WITH PAD STRUCTURE RESISTANT TO PLASMA DAMAGE AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/186974 [patent_app_country] => US [patent_app_date] => 2023-03-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4137 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 298 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18186974 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/186974
SEMICONDUCTOR DEVICE WITH PAD STRUCTURE RESISTANT TO PLASMA DAMAGE AND MANUFACTURING METHOD THEREOF Mar 20, 2023 Pending
Array ( [id] => 18680001 [patent_doc_number] => 20230317659 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-10-05 [patent_title] => METHOD FOR REPLACING SOLDER BALLS OF AN ELECTRONIC PACKAGE [patent_app_type] => utility [patent_app_number] => 18/124154 [patent_app_country] => US [patent_app_date] => 2023-03-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9452 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18124154 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/124154
METHOD FOR REPLACING SOLDER BALLS OF AN ELECTRONIC PACKAGE Mar 20, 2023 Pending
Array ( [id] => 18959070 [patent_doc_number] => 20240047397 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-08 [patent_title] => BUMP STRUCTURE AND METHOD OF MAKING THE SAME [patent_app_type] => utility [patent_app_number] => 18/123794 [patent_app_country] => US [patent_app_date] => 2023-03-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8103 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18123794 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/123794
BUMP STRUCTURE AND METHOD OF MAKING THE SAME Mar 19, 2023 Pending
Array ( [id] => 18776550 [patent_doc_number] => 20230371392 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-16 [patent_title] => MAGNETORESISTIVE MEMORY DEVICE AND SEMICONDUCTOR DEVICE INCLUDING THE SAME [patent_app_type] => utility [patent_app_number] => 18/118571 [patent_app_country] => US [patent_app_date] => 2023-03-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4799 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18118571 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/118571
MAGNETORESISTIVE MEMORY DEVICE AND SEMICONDUCTOR DEVICE INCLUDING THE SAME Mar 6, 2023 Pending
Array ( [id] => 19384599 [patent_doc_number] => 20240274469 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-15 [patent_title] => SEMICONDUCTOR STRUCTURE WITH DEVICES HAVING DIFFERENT EFFECTIVE CHANNELS AND METHOD FOR MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 18/168884 [patent_app_country] => US [patent_app_date] => 2023-02-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 20404 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18168884 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/168884
SEMICONDUCTOR STRUCTURE WITH DEVICES HAVING DIFFERENT EFFECTIVE CHANNELS AND METHOD FOR MANUFACTURING THE SAME Feb 13, 2023 Pending
Array ( [id] => 19086233 [patent_doc_number] => 20240113034 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-04-04 [patent_title] => METHODS FOR FORMING SEMICONDUCTOR PACKAGE [patent_app_type] => utility [patent_app_number] => 18/166109 [patent_app_country] => US [patent_app_date] => 2023-02-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5776 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18166109 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/166109
METHODS FOR FORMING SEMICONDUCTOR PACKAGE Feb 7, 2023 Pending
Array ( [id] => 19349471 [patent_doc_number] => 20240258435 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-01 [patent_title] => INTEGRATED CIRCUIT AND FORMATION METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/163261 [patent_app_country] => US [patent_app_date] => 2023-02-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7773 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18163261 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/163261
INTEGRATED CIRCUIT AND FORMATION METHOD THEREOF Jan 31, 2023 Pending
Array ( [id] => 18698532 [patent_doc_number] => 20230329012 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-10-12 [patent_title] => SEMICONDUCTOR DEVICE AND ELECTRONIC SYSTEM INCLUDING THE SAME [patent_app_type] => utility [patent_app_number] => 18/149929 [patent_app_country] => US [patent_app_date] => 2023-01-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12963 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 192 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18149929 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/149929
SEMICONDUCTOR DEVICE AND ELECTRONIC SYSTEM INCLUDING THE SAME Jan 3, 2023 Pending
Array ( [id] => 19285982 [patent_doc_number] => 20240222459 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-04 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD FOR FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 18/149636 [patent_app_country] => US [patent_app_date] => 2023-01-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12424 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18149636 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/149636
SEMICONDUCTOR DEVICE AND METHOD FOR FORMING THE SAME Jan 2, 2023 Pending
Array ( [id] => 19193533 [patent_doc_number] => 20240172446 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-23 [patent_title] => SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF, MEMORY AND MEMORY SYSTEM [patent_app_type] => utility [patent_app_number] => 18/091055 [patent_app_country] => US [patent_app_date] => 2022-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9321 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18091055 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/091055
SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF, MEMORY AND MEMORY SYSTEM Dec 28, 2022 Pending
Array ( [id] => 19255165 [patent_doc_number] => 20240206162 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-20 [patent_title] => THREE-DIMENSIONAL MEMORY DEVICE AND FABRICATION METHOD [patent_app_type] => utility [patent_app_number] => 18/089869 [patent_app_country] => US [patent_app_date] => 2022-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10079 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18089869 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/089869
THREE-DIMENSIONAL MEMORY DEVICE AND FABRICATION METHOD Dec 27, 2022 Pending
Array ( [id] => 19252922 [patent_doc_number] => 20240203919 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-20 [patent_title] => INTEGRATED CIRCUIT HAVING EXPOSED LEADS [patent_app_type] => utility [patent_app_number] => 18/082285 [patent_app_country] => US [patent_app_date] => 2022-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3318 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18082285 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/082285
INTEGRATED CIRCUIT HAVING EXPOSED LEADS Dec 14, 2022 Pending
Array ( [id] => 18696455 [patent_doc_number] => 20230326894 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-10-12 [patent_title] => FLIP CHIP BONDING METHOD AND CHIP USED THEREIN [patent_app_type] => utility [patent_app_number] => 18/078170 [patent_app_country] => US [patent_app_date] => 2022-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2352 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18078170 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/078170
Flip chip bonding method and chip used therein Dec 8, 2022 Issued
Array ( [id] => 18440239 [patent_doc_number] => 20230187534 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-15 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME [patent_app_type] => utility [patent_app_number] => 18/073544 [patent_app_country] => US [patent_app_date] => 2022-12-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7047 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18073544 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/073544
SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME Nov 30, 2022 Abandoned
Array ( [id] => 18851149 [patent_doc_number] => 20230413553 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-21 [patent_title] => SEMICONDUCTOR MEMORY DEVICE AND MANUFACTURING METHOD OF SEMICONDUCTOR MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 17/991062 [patent_app_country] => US [patent_app_date] => 2022-11-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10891 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17991062 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/991062
SEMICONDUCTOR MEMORY DEVICE AND MANUFACTURING METHOD OF SEMICONDUCTOR MEMORY DEVICE Nov 20, 2022 Pending
Array ( [id] => 20649512 [patent_doc_number] => 12604475 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-04-14 [patent_title] => Memory structure and manufacturing method thereof [patent_app_type] => utility [patent_app_number] => 17/990738 [patent_app_country] => US [patent_app_date] => 2022-11-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 1078 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 197 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17990738 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/990738
Memory structure and manufacturing method thereof Nov 20, 2022 Issued
Array ( [id] => 19071180 [patent_doc_number] => 20240105606 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-28 [patent_title] => BACKSIDE POWER RAIL WITH TIGHT SPACE [patent_app_type] => utility [patent_app_number] => 17/935138 [patent_app_country] => US [patent_app_date] => 2022-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10382 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17935138 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/935138
Backside power rail with tight space Sep 25, 2022 Issued
Array ( [id] => 20345971 [patent_doc_number] => 12469706 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-11-11 [patent_title] => Method for manufacturing trench-gate MOSFET [patent_app_type] => utility [patent_app_number] => 17/951543 [patent_app_country] => US [patent_app_date] => 2022-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 0 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 369 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17951543 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/951543
Method for manufacturing trench-gate MOSFET Sep 22, 2022 Issued
Array ( [id] => 18268472 [patent_doc_number] => 20230089714 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-23 [patent_title] => III-NITRIDE/GALLIUM OXIDE BASED HIGH ELECTRON MOBILITY TRANSISTORS [patent_app_type] => utility [patent_app_number] => 17/939048 [patent_app_country] => US [patent_app_date] => 2022-09-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4101 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 30 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17939048 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/939048
III-Nitride/gallium oxide based high electron mobility transistors Sep 6, 2022 Issued
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