Search

Patrick J. King

Examiner (ID: 2754, Phone: (571)272-3439 , Office: P/2853 )

Most Active Art Unit
2853
Art Unit(s)
2861, 2853
Total Applications
277
Issued Applications
233
Pending Applications
0
Abandoned Applications
43

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18774703 [patent_doc_number] => 20230369534 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-16 [patent_title] => SEMICONDUCTOR LIGHT EMITTING ELEMENT AND METHOD FOR MANUFACTURING SEMICONDUCTOR LIGHT EMITTING ELEMENT [patent_app_type] => utility [patent_app_number] => 18/043220 [patent_app_country] => US [patent_app_date] => 2021-08-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11390 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18043220 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/043220
SEMICONDUCTOR LIGHT EMITTING ELEMENT AND METHOD FOR MANUFACTURING SEMICONDUCTOR LIGHT EMITTING ELEMENT Aug 24, 2021 Pending
Array ( [id] => 20191379 [patent_doc_number] => 12402521 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-08-26 [patent_title] => Display substrate and manufacturing method therefor, and display device [patent_app_type] => utility [patent_app_number] => 17/789168 [patent_app_country] => US [patent_app_date] => 2021-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 17 [patent_no_of_words] => 6169 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 232 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17789168 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/789168
Display substrate and manufacturing method therefor, and display device Aug 9, 2021 Issued
Array ( [id] => 18081004 [patent_doc_number] => 20220406616 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-12-22 [patent_title] => PHYSICAL VAPOR DEPOSITION SEEDING FOR HIGH ASPECT RATIO VIAS IN GLASS CORE TECHNOLOGY [patent_app_type] => utility [patent_app_number] => 17/349667 [patent_app_country] => US [patent_app_date] => 2021-06-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9747 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17349667 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/349667
Physical vapor deposition seeding for high aspect ratio vias in glass core technology Jun 15, 2021 Issued
Array ( [id] => 18061753 [patent_doc_number] => 20220392840 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-12-08 [patent_title] => CONDUCTIVE VIA STRUCTURES FOR GATE CONTACT OR TRENCH CONTACT [patent_app_type] => utility [patent_app_number] => 17/338958 [patent_app_country] => US [patent_app_date] => 2021-06-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15457 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17338958 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/338958
CONDUCTIVE VIA STRUCTURES FOR GATE CONTACT OR TRENCH CONTACT Jun 3, 2021 Pending
Array ( [id] => 20675357 [patent_doc_number] => 12615891 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2026-04-28 [patent_title] => Light-emitting device and manufacturing method therefor, and display panel [patent_app_type] => utility [patent_app_number] => 17/770809 [patent_app_country] => US [patent_app_date] => 2021-06-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 1239 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 277 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17770809 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/770809
Light-emitting device and manufacturing method therefor, and display panel Jun 3, 2021 Issued
Array ( [id] => 18024399 [patent_doc_number] => 20220375898 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-24 [patent_title] => PROGRAMMABLE CAPACITANCE IN THREE-DIMENSIONAL STACKED DIE ARCHITECTURE [patent_app_type] => utility [patent_app_number] => 17/323094 [patent_app_country] => US [patent_app_date] => 2021-05-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16055 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17323094 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/323094
PROGRAMMABLE CAPACITANCE IN THREE-DIMENSIONAL STACKED DIE ARCHITECTURE May 17, 2021 Abandoned
Array ( [id] => 18381930 [patent_doc_number] => 20230157021 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-05-18 [patent_title] => 3D FLUSH MEMORY HAVING IMPROVED STRUCTURE [patent_app_type] => utility [patent_app_number] => 17/923104 [patent_app_country] => US [patent_app_date] => 2021-05-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16048 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17923104 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/923104
3D FLUSH MEMORY HAVING IMPROVED STRUCTURE May 3, 2021 Pending
Array ( [id] => 18196646 [patent_doc_number] => 20230050165 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-02-16 [patent_title] => METHOD FOR PRODUCING AN OHMIC CONTACT ON A CRYSTALLOGRAPHIC C-SIDE OF A SILICON CARBIDE SUBSTRATE, AND OHMIC CONTACT [patent_app_type] => utility [patent_app_number] => 17/792178 [patent_app_country] => US [patent_app_date] => 2021-03-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 1963 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17792178 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/792178
METHOD FOR PRODUCING AN OHMIC CONTACT ON A CRYSTALLOGRAPHIC C-SIDE OF A SILICON CARBIDE SUBSTRATE, AND OHMIC CONTACT Mar 18, 2021 Pending
Array ( [id] => 18266734 [patent_doc_number] => 20230087976 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-23 [patent_title] => NON-PLASMA ENHANCED DEPOSITION FOR RECESS ETCH MATCHING [patent_app_type] => utility [patent_app_number] => 17/802525 [patent_app_country] => US [patent_app_date] => 2021-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8191 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17802525 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/802525
NON-PLASMA ENHANCED DEPOSITION FOR RECESS ETCH MATCHING Feb 24, 2021 Abandoned
Array ( [id] => 18269252 [patent_doc_number] => 20230090494 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-23 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/798532 [patent_app_country] => US [patent_app_date] => 2021-02-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8682 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17798532 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/798532
SEMICONDUCTOR DEVICE Feb 16, 2021 Pending
Array ( [id] => 18712871 [patent_doc_number] => 20230335504 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-10-19 [patent_title] => WAFER MATCHING DESIGN METHOD, WAFER BONDING STRUCTURE AND CHIP BONDING STRUCTURE [patent_app_type] => utility [patent_app_number] => 18/025290 [patent_app_country] => US [patent_app_date] => 2020-10-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6983 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18025290 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/025290
WAFER MATCHING DESIGN METHOD, WAFER BONDING STRUCTURE AND CHIP BONDING STRUCTURE Oct 26, 2020 Pending
Array ( [id] => 19964823 [patent_doc_number] => 12334340 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-06-17 [patent_title] => Epitaxial wafer, semiconductor device, and method for manufacturing epitaxial wafer [patent_app_type] => utility [patent_app_number] => 17/758180 [patent_app_country] => US [patent_app_date] => 2020-02-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4902 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17758180 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/758180
Epitaxial wafer, semiconductor device, and method for manufacturing epitaxial wafer Feb 16, 2020 Issued
Menu