
Patrick J. Lee
Examiner (ID: 15927)
| Most Active Art Unit | 2878 |
| Art Unit(s) | 2878 |
| Total Applications | 337 |
| Issued Applications | 280 |
| Pending Applications | 4 |
| Abandoned Applications | 53 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 9386113
[patent_doc_number] => 20140089596
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-03-27
[patent_title] => 'Read-Copy Update Implementation For Non-Cache-Coherent Systems'
[patent_app_type] => utility
[patent_app_number] => 14/093186
[patent_app_country] => US
[patent_app_date] => 2013-11-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 13
[patent_no_of_words] => 11409
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14093186
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/093186 | Read-copy update implementation for non-cache-coherent systems | Nov 28, 2013 | Issued |
Array
(
[id] => 10258057
[patent_doc_number] => 20150143054
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-05-21
[patent_title] => 'Managing Faulty Memory Pages In A Computing System'
[patent_app_type] => utility
[patent_app_number] => 14/086012
[patent_app_country] => US
[patent_app_date] => 2013-11-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 6528
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14086012
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/086012 | Managing Faulty Memory Pages In A Computing System | Nov 20, 2013 | Abandoned |
Array
(
[id] => 10258027
[patent_doc_number] => 20150143024
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-05-21
[patent_title] => 'REDUNDANT ARRAY OF INDEPENDENT MODULES'
[patent_app_type] => utility
[patent_app_number] => 14/085469
[patent_app_country] => US
[patent_app_date] => 2013-11-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 2382
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14085469
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/085469 | REDUNDANT ARRAY OF INDEPENDENT MODULES | Nov 19, 2013 | Abandoned |
Array
(
[id] => 11780755
[patent_doc_number] => 09389937
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2016-07-12
[patent_title] => 'Managing faulty memory pages in a computing system'
[patent_app_type] => utility
[patent_app_number] => 14/083504
[patent_app_country] => US
[patent_app_date] => 2013-11-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 6498
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 229
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14083504
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/083504 | Managing faulty memory pages in a computing system | Nov 18, 2013 | Issued |
Array
(
[id] => 11701544
[patent_doc_number] => 09691467
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-06-27
[patent_title] => 'Memory and memory system including the same'
[patent_app_type] => utility
[patent_app_number] => 14/084243
[patent_app_country] => US
[patent_app_date] => 2013-11-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 9
[patent_no_of_words] => 7319
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 301
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14084243
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/084243 | Memory and memory system including the same | Nov 18, 2013 | Issued |
Array
(
[id] => 10258056
[patent_doc_number] => 20150143053
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-05-21
[patent_title] => 'SYSTEM AND METHOD FOR IMPROVED STORAGE REQUEST HANDLING IN HOST-SIDE CACHES'
[patent_app_type] => utility
[patent_app_number] => 14/083993
[patent_app_country] => US
[patent_app_date] => 2013-11-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 9848
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14083993
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/083993 | System and method for improved storage request handling in host-side caches | Nov 18, 2013 | Issued |
Array
(
[id] => 9493089
[patent_doc_number] => 20140143494
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-05-22
[patent_title] => 'SYSTEMS AND METHODS FOR IMPROVING PROCESSOR EFFICIENCY THROUGH CACHING'
[patent_app_type] => utility
[patent_app_number] => 14/084433
[patent_app_country] => US
[patent_app_date] => 2013-11-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 14
[patent_no_of_words] => 13670
[patent_no_of_claims] => 25
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14084433
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/084433 | Systems and methods for improving processor efficiency through caching | Nov 18, 2013 | Issued |
Array
(
[id] => 11861018
[patent_doc_number] => 09740700
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2017-08-22
[patent_title] => 'Snapshot map'
[patent_app_type] => utility
[patent_app_number] => 14/083201
[patent_app_country] => US
[patent_app_date] => 2013-11-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 16
[patent_no_of_words] => 12056
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 221
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14083201
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/083201 | Snapshot map | Nov 17, 2013 | Issued |
Array
(
[id] => 11411495
[patent_doc_number] => 09558805
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-01-31
[patent_title] => 'Memory modules and memory systems'
[patent_app_type] => utility
[patent_app_number] => 14/083033
[patent_app_country] => US
[patent_app_date] => 2013-11-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 21
[patent_figures_cnt] => 23
[patent_no_of_words] => 14804
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 196
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14083033
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/083033 | Memory modules and memory systems | Nov 17, 2013 | Issued |
Array
(
[id] => 11264903
[patent_doc_number] => 09489201
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2016-11-08
[patent_title] => 'Partitioned register file'
[patent_app_type] => utility
[patent_app_number] => 14/082476
[patent_app_country] => US
[patent_app_date] => 2013-11-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 5
[patent_no_of_words] => 3311
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 202
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14082476
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/082476 | Partitioned register file | Nov 17, 2013 | Issued |
Array
(
[id] => 10746200
[patent_doc_number] => 20160092351
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-03-31
[patent_title] => 'MEMORY MODULE HAVING DIFFERENT TYPES OF MEMORY MOUNTED TOGETHER THEREON, AND INFORMATION PROCESSING DEVICE HAVING MEMORY MODULE MOUNTED THEREIN'
[patent_app_type] => utility
[patent_app_number] => 14/764838
[patent_app_country] => US
[patent_app_date] => 2013-06-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 21
[patent_figures_cnt] => 21
[patent_no_of_words] => 8571
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14764838
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/764838 | Memory module having different types of memory mounted together thereon, and information processing device having memory module mounted therein | Jun 19, 2013 | Issued |
Array
(
[id] => 10962706
[patent_doc_number] => 20140365736
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-12-11
[patent_title] => 'Hardware Based Cache Scan with Divert Node Handling'
[patent_app_type] => utility
[patent_app_number] => 13/917735
[patent_app_country] => US
[patent_app_date] => 2013-06-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 4094
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13917735
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/917735 | Hardware based cache scan with divert node handling | Jun 13, 2013 | Issued |
Array
(
[id] => 10969679
[patent_doc_number] => 20140372712
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-12-18
[patent_title] => 'CONCURRENT DUMPING OF LARGE ADDRESS SPACE'
[patent_app_type] => utility
[patent_app_number] => 13/918045
[patent_app_country] => US
[patent_app_date] => 2013-06-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 6019
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13918045
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/918045 | Concurrent dumping of large address space | Jun 13, 2013 | Issued |
Array
(
[id] => 13226757
[patent_doc_number] => 10127154
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-11-13
[patent_title] => Caching data in a memory system having memory nodes at different hierarchical levels
[patent_app_type] => utility
[patent_app_number] => 14/764651
[patent_app_country] => US
[patent_app_date] => 2013-03-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 6670
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 159
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14764651
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/764651 | Caching data in a memory system having memory nodes at different hierarchical levels | Mar 19, 2013 | Issued |
Array
(
[id] => 10485702
[patent_doc_number] => 20150370721
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-12-24
[patent_title] => 'MAPPING MECHANISM FOR LARGE SHARED ADDRESS SPACES'
[patent_app_type] => utility
[patent_app_number] => 14/764922
[patent_app_country] => US
[patent_app_date] => 2013-01-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 3908
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14764922
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/764922 | MAPPING MECHANISM FOR LARGE SHARED ADDRESS SPACES | Jan 30, 2013 | Abandoned |
Array
(
[id] => 10651142
[patent_doc_number] => 09367394
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2016-06-14
[patent_title] => 'Decoupled reliability groups'
[patent_app_type] => utility
[patent_app_number] => 13/708784
[patent_app_country] => US
[patent_app_date] => 2012-12-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 13
[patent_no_of_words] => 12155
[patent_no_of_claims] => 26
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 198
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13708784
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/708784 | Decoupled reliability groups | Dec 6, 2012 | Issued |
Array
(
[id] => 8941540
[patent_doc_number] => 20130191337
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-07-25
[patent_title] => 'OFFLINE INITIALIZATION FOR A REMOTE MIRROR STORAGE FACILITY'
[patent_app_type] => utility
[patent_app_number] => 13/535621
[patent_app_country] => US
[patent_app_date] => 2012-06-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 5977
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13535621
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/535621 | Offline initialization for a remote mirror storage facility | Jun 27, 2012 | Issued |
Array
(
[id] => 8941540
[patent_doc_number] => 20130191337
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-07-25
[patent_title] => 'OFFLINE INITIALIZATION FOR A REMOTE MIRROR STORAGE FACILITY'
[patent_app_type] => utility
[patent_app_number] => 13/535621
[patent_app_country] => US
[patent_app_date] => 2012-06-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 5977
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13535621
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/535621 | Offline initialization for a remote mirror storage facility | Jun 27, 2012 | Issued |
Array
(
[id] => 10183811
[patent_doc_number] => 09213490
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-12-15
[patent_title] => 'Computer system and data migration method'
[patent_app_type] => utility
[patent_app_number] => 13/519272
[patent_app_country] => US
[patent_app_date] => 2012-06-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 24
[patent_figures_cnt] => 29
[patent_no_of_words] => 13098
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 802
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13519272
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/519272 | Computer system and data migration method | Jun 17, 2012 | Issued |
Array
(
[id] => 10569037
[patent_doc_number] => 09292205
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2016-03-22
[patent_title] => 'Methods and systems for adaptive queue depth management'
[patent_app_type] => utility
[patent_app_number] => 13/517732
[patent_app_country] => US
[patent_app_date] => 2012-06-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 7465
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 271
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13517732
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/517732 | Methods and systems for adaptive queue depth management | Jun 13, 2012 | Issued |