Search

Patrick Moon

Examiner (ID: 19451)

Most Active Art Unit
2694
Art Unit(s)
2629, 2694
Total Applications
474
Issued Applications
283
Pending Applications
1
Abandoned Applications
192

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 13995971 [patent_doc_number] => 20190067143 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-02-28 [patent_title] => MOLDED WAFER LEVEL PACKAGING [patent_app_type] => utility [patent_app_number] => 15/812591 [patent_app_country] => US [patent_app_date] => 2017-11-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8831 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 173 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15812591 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/812591
Molded wafer level packaging Nov 13, 2017 Issued
Array ( [id] => 12738628 [patent_doc_number] => 20180138043 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-05-17 [patent_title] => III-V SEMICONDUCTOR DIODE [patent_app_type] => utility [patent_app_number] => 15/812416 [patent_app_country] => US [patent_app_date] => 2017-11-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2263 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15812416 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/812416
III-V semiconductor diode Nov 13, 2017 Issued
Array ( [id] => 16133019 [patent_doc_number] => 10700281 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-06-30 [patent_title] => Semiconductor random access memory and manufacturing method thereof [patent_app_type] => utility [patent_app_number] => 15/812445 [patent_app_country] => US [patent_app_date] => 2017-11-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 14 [patent_no_of_words] => 4397 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15812445 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/812445
Semiconductor random access memory and manufacturing method thereof Nov 13, 2017 Issued
Array ( [id] => 15375929 [patent_doc_number] => 10529692 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-01-07 [patent_title] => Semiconductor module including package and heat transfer structure [patent_app_type] => utility [patent_app_number] => 15/812482 [patent_app_country] => US [patent_app_date] => 2017-11-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 5281 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 219 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15812482 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/812482
Semiconductor module including package and heat transfer structure Nov 13, 2017 Issued
Array ( [id] => 12739462 [patent_doc_number] => 20180138321 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-05-17 [patent_title] => STACKED SCHOTTKY DIODE [patent_app_type] => utility [patent_app_number] => 15/812446 [patent_app_country] => US [patent_app_date] => 2017-11-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2699 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 317 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15812446 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/812446
Stacked Schottky diode Nov 13, 2017 Issued
Array ( [id] => 12739459 [patent_doc_number] => 20180138320 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-05-17 [patent_title] => III-V SEMICONDUCTOR DIODE [patent_app_type] => utility [patent_app_number] => 15/812432 [patent_app_country] => US [patent_app_date] => 2017-11-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2285 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15812432 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/812432
III-V semiconductor diode Nov 13, 2017 Issued
Array ( [id] => 12739303 [patent_doc_number] => 20180138268 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-05-17 [patent_title] => METHOD OF PREVENTING BULK SILICON CHARGE TRANSFER FOR NANOWIRE AND NANOSLAB PROCESSING [patent_app_type] => utility [patent_app_number] => 15/812313 [patent_app_country] => US [patent_app_date] => 2017-11-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5408 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15812313 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/812313
Method of preventing bulk silicon charge transfer for nanowire and nanoslab processing Nov 13, 2017 Issued
Array ( [id] => 13470585 [patent_doc_number] => 20180286835 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-10-04 [patent_title] => SEMICONDUCTOR PACKAGES AND METHODS OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 15/812638 [patent_app_country] => US [patent_app_date] => 2017-11-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9870 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15812638 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/812638
SEMICONDUCTOR PACKAGES AND METHODS OF MANUFACTURING THE SAME Nov 13, 2017 Abandoned
Array ( [id] => 12615486 [patent_doc_number] => 20180096992 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-04-05 [patent_title] => SHALLOW TRENCH ISOLATION RECESS PROCESS FLOW FOR VERTICAL FIELD EFFECT TRANSISTOR FABRICATION [patent_app_type] => utility [patent_app_number] => 15/796944 [patent_app_country] => US [patent_app_date] => 2017-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6779 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 214 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15796944 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/796944
Shallow trench isolation recess process flow for vertical field effect transistor fabrication Oct 29, 2017 Issued
Array ( [id] => 12188700 [patent_doc_number] => 20180047636 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-02-15 [patent_title] => 'METHOD OF FABRICATING FINFET STRUCTURE' [patent_app_type] => utility [patent_app_number] => 15/793491 [patent_app_country] => US [patent_app_date] => 2017-10-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 72 [patent_figures_cnt] => 72 [patent_no_of_words] => 13193 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15793491 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/793491
Method of fabricating FinFET structure Oct 24, 2017 Issued
Array ( [id] => 13405371 [patent_doc_number] => 20180254228 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-09-06 [patent_title] => SEMICONDUCTOR POWER MODULE AND POWER CONVERSION APPARATUS [patent_app_type] => utility [patent_app_number] => 15/790088 [patent_app_country] => US [patent_app_date] => 2017-10-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3169 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -3 [patent_words_short_claim] => 51 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15790088 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/790088
Semiconductor power module and power conversion apparatus Oct 22, 2017 Issued
Array ( [id] => 13749249 [patent_doc_number] => 10167558 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-01-01 [patent_title] => Phase shifted gas delivery for high throughput and cost effectiveness associated with atomic layer etching and atomic layer deposition [patent_app_type] => utility [patent_app_number] => 15/782967 [patent_app_country] => US [patent_app_date] => 2017-10-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 4619 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15782967 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/782967
Phase shifted gas delivery for high throughput and cost effectiveness associated with atomic layer etching and atomic layer deposition Oct 12, 2017 Issued
Array ( [id] => 13160111 [patent_doc_number] => 10096791 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-10-09 [patent_title] => Organic light emitting diode and organic light emitting display device using the same [patent_app_type] => utility [patent_app_number] => 15/783127 [patent_app_country] => US [patent_app_date] => 2017-10-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 8010 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15783127 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/783127
Organic light emitting diode and organic light emitting display device using the same Oct 12, 2017 Issued
Array ( [id] => 13755009 [patent_doc_number] => 10170458 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-01-01 [patent_title] => Manufacturing method of package-on-package structure [patent_app_type] => utility [patent_app_number] => 15/782862 [patent_app_country] => US [patent_app_date] => 2017-10-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 6218 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 180 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15782862 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/782862
Manufacturing method of package-on-package structure Oct 12, 2017 Issued
Array ( [id] => 15061367 [patent_doc_number] => 10460995 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-10-29 [patent_title] => Method of manufacture of a FinFET device [patent_app_type] => utility [patent_app_number] => 15/783188 [patent_app_country] => US [patent_app_date] => 2017-10-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 9082 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15783188 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/783188
Method of manufacture of a FinFET device Oct 12, 2017 Issued
Array ( [id] => 14191123 [patent_doc_number] => 20190115267 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-04-18 [patent_title] => METHOD AND APPARATUS FOR DETERMINING PROCESS PARAMETERS [patent_app_type] => utility [patent_app_number] => 15/783301 [patent_app_country] => US [patent_app_date] => 2017-10-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5236 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15783301 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/783301
Method and apparatus for determining etch process parameters Oct 12, 2017 Issued
Array ( [id] => 16660730 [patent_doc_number] => 20210057367 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-02-25 [patent_title] => INTEGRATING AND ACCESSING PASSIVE COMPONENTS IN WAFER-LEVEL PACKAGES [patent_app_type] => utility [patent_app_number] => 16/635146 [patent_app_country] => US [patent_app_date] => 2017-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6535 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16635146 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/635146
Integrating and accessing passive components in wafer-level packages Sep 28, 2017 Issued
Array ( [id] => 12154926 [patent_doc_number] => 20180026190 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-01-25 [patent_title] => 'VAPOR DEPOSITION MASK, FRAME-EQUIPPED VAPOR DEPOSITION MASK, AND METHOD FOR PRODUCING ORGANIC SEMICONDUCTOR ELEMENT' [patent_app_type] => utility [patent_app_number] => 15/719683 [patent_app_country] => US [patent_app_date] => 2017-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 11793 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15719683 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/719683
Vapor deposition mask, frame-equipped vapor deposition mask, and method for producing organic semiconductor element Sep 28, 2017 Issued
Array ( [id] => 16098679 [patent_doc_number] => 20200203326 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-06-25 [patent_title] => PACKAGE ON PACKAGE ASSEMBLY [patent_app_type] => utility [patent_app_number] => 16/637548 [patent_app_country] => US [patent_app_date] => 2017-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5767 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16637548 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/637548
PACKAGE ON PACKAGE ASSEMBLY Sep 28, 2017 Abandoned
Array ( [id] => 19153804 [patent_doc_number] => 11978727 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-05-07 [patent_title] => Package on active silicon semiconductor packages [patent_app_type] => utility [patent_app_number] => 16/641922 [patent_app_country] => US [patent_app_date] => 2017-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 22 [patent_no_of_words] => 13555 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 442 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16641922 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/641922
Package on active silicon semiconductor packages Sep 27, 2017 Issued
Menu