Search

Patrick O. Neill

Examiner (ID: 5804, Phone: (571)270-1677 , Office: P/2842 )

Most Active Art Unit
2842
Art Unit(s)
2809, 2816, 2842
Total Applications
1124
Issued Applications
988
Pending Applications
43
Abandoned Applications
115

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18167564 [patent_doc_number] => 20230034171 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-02-02 [patent_title] => LATCH CIRCUIT [patent_app_type] => utility [patent_app_number] => 17/608401 [patent_app_country] => US [patent_app_date] => 2021-03-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4298 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17608401 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/608401
Latch circuit Mar 8, 2021 Issued
Array ( [id] => 17856095 [patent_doc_number] => 20220286138 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-08 [patent_title] => Phase Locked Loop with Low Reference Spur [patent_app_type] => utility [patent_app_number] => 17/191268 [patent_app_country] => US [patent_app_date] => 2021-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14453 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 46 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17191268 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/191268
Phase Locked Loop with Low Reference Spur Mar 2, 2021 Abandoned
Array ( [id] => 16919980 [patent_doc_number] => 20210193072 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-06-24 [patent_title] => Driver Circuit, Display Device, And Electronic Device [patent_app_type] => utility [patent_app_number] => 17/190945 [patent_app_country] => US [patent_app_date] => 2021-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 35401 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17190945 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/190945
Driver circuit, display device, and electronic device Mar 2, 2021 Issued
Array ( [id] => 16919980 [patent_doc_number] => 20210193072 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-06-24 [patent_title] => Driver Circuit, Display Device, And Electronic Device [patent_app_type] => utility [patent_app_number] => 17/190945 [patent_app_country] => US [patent_app_date] => 2021-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 35401 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17190945 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/190945
Driver circuit, display device, and electronic device Mar 2, 2021 Issued
Array ( [id] => 16919980 [patent_doc_number] => 20210193072 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-06-24 [patent_title] => Driver Circuit, Display Device, And Electronic Device [patent_app_type] => utility [patent_app_number] => 17/190945 [patent_app_country] => US [patent_app_date] => 2021-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 35401 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17190945 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/190945
Driver circuit, display device, and electronic device Mar 2, 2021 Issued
Array ( [id] => 16919980 [patent_doc_number] => 20210193072 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-06-24 [patent_title] => Driver Circuit, Display Device, And Electronic Device [patent_app_type] => utility [patent_app_number] => 17/190945 [patent_app_country] => US [patent_app_date] => 2021-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 35401 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17190945 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/190945
Driver circuit, display device, and electronic device Mar 2, 2021 Issued
Array ( [id] => 17645986 [patent_doc_number] => 20220173725 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-02 [patent_title] => TRUE SINGLE-PHASE CLOCK (TSPC) NAND-BASED RESET FLIP-FLOP [patent_app_type] => utility [patent_app_number] => 17/188510 [patent_app_country] => US [patent_app_date] => 2021-03-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12327 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17188510 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/188510
True single-phase clock (TSPC) NAND-based reset flip-flop Feb 28, 2021 Issued
Array ( [id] => 17475026 [patent_doc_number] => 20220082530 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-03-17 [patent_title] => CONTROL APPARATUS AND SENSOR APPARATUS [patent_app_type] => utility [patent_app_number] => 17/186101 [patent_app_country] => US [patent_app_date] => 2021-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3601 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17186101 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/186101
Control apparatus and sensor apparatus Feb 25, 2021 Issued
Array ( [id] => 17100862 [patent_doc_number] => 20210288653 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-09-16 [patent_title] => TIMING ALIGNMENT SYSTEMS WITH GAP DETECTION AND COMPENSATION [patent_app_type] => utility [patent_app_number] => 17/249272 [patent_app_country] => US [patent_app_date] => 2021-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5283 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17249272 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/249272
Timing alignment systems with gap detection and compensation Feb 24, 2021 Issued
Array ( [id] => 17070277 [patent_doc_number] => 20210272494 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-09-02 [patent_title] => SHIFT REGISTER CIRCUIT, ACTIVE MATRIX SUBSTRATE, AND DISPLAY APPARATUS [patent_app_type] => utility [patent_app_number] => 17/185205 [patent_app_country] => US [patent_app_date] => 2021-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10572 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 255 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17185205 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/185205
Shift register circuit, active matrix substrate, and display apparatus Feb 24, 2021 Issued
Array ( [id] => 17623835 [patent_doc_number] => 11342904 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2022-05-24 [patent_title] => D flip-flop [patent_app_type] => utility [patent_app_number] => 17/184640 [patent_app_country] => US [patent_app_date] => 2021-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 34 [patent_no_of_words] => 9974 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 627 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17184640 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/184640
D flip-flop Feb 24, 2021 Issued
Array ( [id] => 19369890 [patent_doc_number] => 12061976 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-08-13 [patent_title] => Output circuits for an analog neural memory system for deep learning neural network [patent_app_type] => utility [patent_app_number] => 17/181656 [patent_app_country] => US [patent_app_date] => 2021-02-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 37 [patent_figures_cnt] => 37 [patent_no_of_words] => 12345 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17181656 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/181656
Output circuits for an analog neural memory system for deep learning neural network Feb 21, 2021 Issued
17/179229 SKEW-CORRECTING CLOCK BUFFER Feb 17, 2021 Abandoned
Array ( [id] => 17819218 [patent_doc_number] => 11424846 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2022-08-23 [patent_title] => Recursive serializers and deserializers [patent_app_type] => utility [patent_app_number] => 17/169259 [patent_app_country] => US [patent_app_date] => 2021-02-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 7217 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17169259 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/169259
Recursive serializers and deserializers Feb 4, 2021 Issued
Array ( [id] => 17033452 [patent_doc_number] => 11095275 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-08-17 [patent_title] => Loadable true-single-phase-clocking flop [patent_app_type] => utility [patent_app_number] => 17/164722 [patent_app_country] => US [patent_app_date] => 2021-02-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 7262 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 230 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17164722 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/164722
Loadable true-single-phase-clocking flop Jan 31, 2021 Issued
Array ( [id] => 17439629 [patent_doc_number] => 11264974 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-03-01 [patent_title] => Processing circuit using delay element coupled between control terminal and connection terminal of input transistor for hold time violation immunity [patent_app_type] => utility [patent_app_number] => 17/151672 [patent_app_country] => US [patent_app_date] => 2021-01-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 12 [patent_no_of_words] => 4011 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17151672 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/151672
Processing circuit using delay element coupled between control terminal and connection terminal of input transistor for hold time violation immunity Jan 18, 2021 Issued
Array ( [id] => 18192807 [patent_doc_number] => 20230046326 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-02-16 [patent_title] => A FRACTIONAL-N FREQUENCY SYNTHESIZER BASED ON A CHARGE-SHARING LOCKING TECHNIQUE [patent_app_type] => utility [patent_app_number] => 17/792636 [patent_app_country] => US [patent_app_date] => 2021-01-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6318 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17792636 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/792636
Fractional-N frequency synthesizer based on a charge-sharing locking technique Jan 13, 2021 Issued
Array ( [id] => 17366464 [patent_doc_number] => 11233500 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2022-01-25 [patent_title] => Clock distribution network, a semiconductor apparatus and a semiconductor system using the same [patent_app_type] => utility [patent_app_number] => 17/146988 [patent_app_country] => US [patent_app_date] => 2021-01-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 9665 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17146988 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/146988
Clock distribution network, a semiconductor apparatus and a semiconductor system using the same Jan 11, 2021 Issued
Array ( [id] => 17544743 [patent_doc_number] => 11309884 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2022-04-19 [patent_title] => Switching circuits having drain connected ferrite beads [patent_app_type] => utility [patent_app_number] => 17/138101 [patent_app_country] => US [patent_app_date] => 2020-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 6772 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17138101 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/138101
Switching circuits having drain connected ferrite beads Dec 29, 2020 Issued
Array ( [id] => 18275559 [patent_doc_number] => 11614499 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-03-28 [patent_title] => Methods and apparatus to improve detection of capacitors implemented for regulators [patent_app_type] => utility [patent_app_number] => 17/133378 [patent_app_country] => US [patent_app_date] => 2020-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 20026 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17133378 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/133378
Methods and apparatus to improve detection of capacitors implemented for regulators Dec 22, 2020 Issued
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