Search

Patrick O. Neill

Examiner (ID: 51, Phone: (571)270-1677 , Office: P/2842 )

Most Active Art Unit
2842
Art Unit(s)
2816, 2836, 2809, 2842
Total Applications
1143
Issued Applications
993
Pending Applications
56
Abandoned Applications
116

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19053542 [patent_doc_number] => 20240095511 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-21 [patent_title] => OUTPUT CIRCUIT [patent_app_type] => utility [patent_app_number] => 18/522153 [patent_app_country] => US [patent_app_date] => 2023-11-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12387 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18522153 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/522153
Output circuit Nov 27, 2023 Issued
Array ( [id] => 20176401 [patent_doc_number] => 12395161 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-08-19 [patent_title] => Flip-flop based on clock signal and pulse signal [patent_app_type] => utility [patent_app_number] => 18/507867 [patent_app_country] => US [patent_app_date] => 2023-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 4521 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18507867 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/507867
Flip-flop based on clock signal and pulse signal Nov 12, 2023 Issued
Array ( [id] => 20147193 [patent_doc_number] => 12381542 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-08-05 [patent_title] => System for selectively adding noise pedestal to generated signal [patent_app_type] => utility [patent_app_number] => 18/385516 [patent_app_country] => US [patent_app_date] => 2023-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2484 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 225 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18385516 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/385516
System for selectively adding noise pedestal to generated signal Oct 30, 2023 Issued
Array ( [id] => 20004499 [patent_doc_number] => 20250142721 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-05-01 [patent_title] => ELECTRONIC CONTROL UNIT INTERFACES WITH FLEXIBLE INPUT SIGNAL CONDITIONING [patent_app_type] => utility [patent_app_number] => 18/496148 [patent_app_country] => US [patent_app_date] => 2023-10-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2126 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 242 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18496148 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/496148
Electronic control unit interfaces with flexible input signal conditioning Oct 26, 2023 Issued
Array ( [id] => 20004489 [patent_doc_number] => 20250142711 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-05-01 [patent_title] => ADAPTABLE ELECTRONIC CONTROL UNIT INTERFACES [patent_app_type] => utility [patent_app_number] => 18/495497 [patent_app_country] => US [patent_app_date] => 2023-10-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18495497 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/495497
ADAPTABLE ELECTRONIC CONTROL UNIT INTERFACES Oct 25, 2023 Pending
Array ( [id] => 18990873 [patent_doc_number] => 20240062842 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-22 [patent_title] => PROGRAMMABLE LINEAR-FEEDBACK SHIFT REGISTER SYSTEMS AND METHODS [patent_app_type] => utility [patent_app_number] => 18/495584 [patent_app_country] => US [patent_app_date] => 2023-10-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 21161 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18495584 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/495584
Programmable linear-feedback shift register systems and methods Oct 25, 2023 Issued
Array ( [id] => 18959808 [patent_doc_number] => 20240048135 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-08 [patent_title] => METHOD OF AND APPARATUS FOR CONTROLLING CLOCK SIGNAL [patent_app_type] => utility [patent_app_number] => 18/489692 [patent_app_country] => US [patent_app_date] => 2023-10-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11445 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 170 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18489692 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/489692
Method of and apparatus for controlling clock signal Oct 17, 2023 Issued
Array ( [id] => 20483072 [patent_doc_number] => 12531549 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-01-20 [patent_title] => Latch circuits and methods for operating the same [patent_app_type] => utility [patent_app_number] => 18/480751 [patent_app_country] => US [patent_app_date] => 2023-10-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 12 [patent_no_of_words] => 2085 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18480751 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/480751
Latch circuits and methods for operating the same Oct 3, 2023 Issued
Array ( [id] => 19880380 [patent_doc_number] => 20250112637 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-04-03 [patent_title] => APPARATUS TO CHARGE BOOTSTRAP CAPACITOR [patent_app_type] => utility [patent_app_number] => 18/477979 [patent_app_country] => US [patent_app_date] => 2023-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10268 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18477979 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/477979
APPARATUS TO CHARGE BOOTSTRAP CAPACITOR Sep 28, 2023 Pending
Array ( [id] => 18906756 [patent_doc_number] => 20240022241 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-18 [patent_title] => POWER CIRCUIT, DRIVING CIRCUIT AND METHOD FOR PROVIDING DRIVING VOLTAGE [patent_app_type] => utility [patent_app_number] => 18/477018 [patent_app_country] => US [patent_app_date] => 2023-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6682 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18477018 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/477018
Power circuit, driving circuit and method for providing driving voltage Sep 27, 2023 Issued
Array ( [id] => 19935535 [patent_doc_number] => 12308745 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-05-20 [patent_title] => Switching circuit and power supply circuit [patent_app_type] => utility [patent_app_number] => 18/370513 [patent_app_country] => US [patent_app_date] => 2023-09-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 22 [patent_no_of_words] => 8574 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18370513 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/370513
Switching circuit and power supply circuit Sep 19, 2023 Issued
Array ( [id] => 19848549 [patent_doc_number] => 20250093900 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-03-20 [patent_title] => SYSTEMS AND METHODS FOR ELECTRONIC FUSE MANAGEMENT [patent_app_type] => utility [patent_app_number] => 18/467234 [patent_app_country] => US [patent_app_date] => 2023-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16255 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -28 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18467234 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/467234
SYSTEMS AND METHODS FOR ELECTRONIC FUSE MANAGEMENT Sep 13, 2023 Abandoned
Array ( [id] => 19365012 [patent_doc_number] => 20240267046 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-08 [patent_title] => DRIVER CIRCUITRY AND ELECTRONIC CIRCUITRY [patent_app_type] => utility [patent_app_number] => 18/367761 [patent_app_country] => US [patent_app_date] => 2023-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4510 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 487 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18367761 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/367761
Driver circuitry and electronic circuitry Sep 12, 2023 Issued
Array ( [id] => 19147244 [patent_doc_number] => 20240146299 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-02 [patent_title] => VOLTAGE FOLLOWER CIRCUIT [patent_app_type] => utility [patent_app_number] => 18/465169 [patent_app_country] => US [patent_app_date] => 2023-09-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 1621 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -5 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18465169 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/465169
Voltage follower circuit Sep 11, 2023 Issued
Array ( [id] => 20161785 [patent_doc_number] => 12388427 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-08-12 [patent_title] => Retention flip-flop with multiple positive supply voltage domains [patent_app_type] => utility [patent_app_number] => 18/459522 [patent_app_country] => US [patent_app_date] => 2023-09-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 4402 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18459522 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/459522
Retention flip-flop with multiple positive supply voltage domains Aug 31, 2023 Issued
Array ( [id] => 19071922 [patent_doc_number] => 20240106348 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-28 [patent_title] => SEMICONDUCTOR INTEGRATED CIRCUIT, TRANSMITTER, AND SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/460086 [patent_app_country] => US [patent_app_date] => 2023-09-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9614 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 284 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18460086 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/460086
Semiconductor integrated circuit, transmitter, and semiconductor device Aug 31, 2023 Issued
Array ( [id] => 19804860 [patent_doc_number] => 20250070785 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-02-27 [patent_title] => METHOD TO TEST SYNCHRONOUS DOMAINS DURING STUCK-AT TEST [patent_app_type] => utility [patent_app_number] => 18/236038 [patent_app_country] => US [patent_app_date] => 2023-08-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6827 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 235 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18236038 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/236038
METHOD TO TEST SYNCHRONOUS DOMAINS DURING STUCK-AT TEST Aug 20, 2023 Pending
Array ( [id] => 19428855 [patent_doc_number] => 12088295 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-09-10 [patent_title] => Semiconductor device including a level shifter and method of mitigating a delay between input and output signals [patent_app_type] => utility [patent_app_number] => 18/447369 [patent_app_country] => US [patent_app_date] => 2023-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 7027 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18447369 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/447369
Semiconductor device including a level shifter and method of mitigating a delay between input and output signals Aug 9, 2023 Issued
Array ( [id] => 19679115 [patent_doc_number] => 12190986 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-01-07 [patent_title] => Sense amplifier for coupling effect reduction [patent_app_type] => utility [patent_app_number] => 18/447904 [patent_app_country] => US [patent_app_date] => 2023-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 13206 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 198 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18447904 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/447904
Sense amplifier for coupling effect reduction Aug 9, 2023 Issued
Array ( [id] => 18813578 [patent_doc_number] => 20230387915 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-30 [patent_title] => Semiconductor Device Including a Level Shifter and Method of Mitigating a Delay Between Input and Output Signals [patent_app_type] => utility [patent_app_number] => 18/447372 [patent_app_country] => US [patent_app_date] => 2023-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7025 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18447372 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/447372
Semiconductor device including a level shifter and method of mitigating a delay between input and output signals Aug 9, 2023 Issued
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