Search

Patrick O. Neill

Examiner (ID: 10800, Phone: (571)270-1677 , Office: P/2842 )

Most Active Art Unit
2842
Art Unit(s)
2842, 2816, 2809
Total Applications
1117
Issued Applications
981
Pending Applications
44
Abandoned Applications
115

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18387868 [patent_doc_number] => 11658666 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2023-05-23 [patent_title] => Fractional-N ADPLL with reference dithering [patent_app_type] => utility [patent_app_number] => 17/708681 [patent_app_country] => US [patent_app_date] => 2022-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 4892 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 46 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17708681 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/708681
Fractional-N ADPLL with reference dithering Mar 29, 2022 Issued
Array ( [id] => 18380488 [patent_doc_number] => 20230155578 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-05-18 [patent_title] => COMPUTING DEVICE FOR PERFORMING DIGITAL PULSE-BASED CROSSBAR OPERATION AND METHOD OF OPERATING THE COMPUTING DEVICE [patent_app_type] => utility [patent_app_number] => 17/702170 [patent_app_country] => US [patent_app_date] => 2022-03-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11770 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17702170 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/702170
Computing device for performing digital pulse-based crossbar operation and method of operating the computing device Mar 22, 2022 Issued
Array ( [id] => 18521171 [patent_doc_number] => 11711070 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-07-25 [patent_title] => Semiconductor device [patent_app_type] => utility [patent_app_number] => 17/698870 [patent_app_country] => US [patent_app_date] => 2022-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 28 [patent_no_of_words] => 16614 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 908 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17698870 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/698870
Semiconductor device Mar 17, 2022 Issued
Array ( [id] => 19782089 [patent_doc_number] => 12231136 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-02-18 [patent_title] => Type-I PLLs for phase-controlled applications [patent_app_type] => utility [patent_app_number] => 17/655399 [patent_app_country] => US [patent_app_date] => 2022-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 9559 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17655399 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/655399
Type-I PLLs for phase-controlled applications Mar 17, 2022 Issued
Array ( [id] => 19428861 [patent_doc_number] => 12088301 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-09-10 [patent_title] => Resetting integrated circuits [patent_app_type] => utility [patent_app_number] => 17/696352 [patent_app_country] => US [patent_app_date] => 2022-03-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 7704 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17696352 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/696352
Resetting integrated circuits Mar 15, 2022 Issued
Array ( [id] => 19228797 [patent_doc_number] => 12008435 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-06-11 [patent_title] => Frequency configuration in quantum gates for leakage removal [patent_app_type] => utility [patent_app_number] => 17/694820 [patent_app_country] => US [patent_app_date] => 2022-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 8991 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17694820 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/694820
Frequency configuration in quantum gates for leakage removal Mar 14, 2022 Issued
Array ( [id] => 18358332 [patent_doc_number] => 11646743 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2023-05-09 [patent_title] => Digital phase-locked loop [patent_app_type] => utility [patent_app_number] => 17/654073 [patent_app_country] => US [patent_app_date] => 2022-03-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 16074 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 213 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17654073 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/654073
Digital phase-locked loop Mar 8, 2022 Issued
Array ( [id] => 17871709 [patent_doc_number] => 20220294446 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-15 [patent_title] => VOLTAGE CONVERSION CIRCUIT [patent_app_type] => utility [patent_app_number] => 17/688989 [patent_app_country] => US [patent_app_date] => 2022-03-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4263 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17688989 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/688989
Voltage conversion circuit Mar 7, 2022 Issued
Array ( [id] => 18380487 [patent_doc_number] => 20230155577 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-05-18 [patent_title] => SEMICONDUCTOR DEVICE USING PIPE CIRCUIT [patent_app_type] => utility [patent_app_number] => 17/685575 [patent_app_country] => US [patent_app_date] => 2022-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10297 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17685575 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/685575
Semiconductor device using pipe circuit Mar 2, 2022 Issued
Array ( [id] => 18175641 [patent_doc_number] => 11575367 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2023-02-07 [patent_title] => Flip-flop circuit and asynchronous receiving circuit [patent_app_type] => utility [patent_app_number] => 17/682876 [patent_app_country] => US [patent_app_date] => 2022-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 28 [patent_no_of_words] => 8688 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17682876 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/682876
Flip-flop circuit and asynchronous receiving circuit Feb 27, 2022 Issued
Array ( [id] => 18157602 [patent_doc_number] => 11570606 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-01-31 [patent_title] => Bluetooth controller circuit for reducing possibility of noise generation [patent_app_type] => utility [patent_app_number] => 17/677174 [patent_app_country] => US [patent_app_date] => 2022-02-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 9516 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17677174 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/677174
Bluetooth controller circuit for reducing possibility of noise generation Feb 21, 2022 Issued
Array ( [id] => 17765638 [patent_doc_number] => 20220239252 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-07-28 [patent_title] => ENERGY HARVESTER [patent_app_type] => utility [patent_app_number] => 17/586036 [patent_app_country] => US [patent_app_date] => 2022-01-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3194 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -4 [patent_words_short_claim] => 213 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17586036 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/586036
Energy harvester Jan 26, 2022 Issued
Array ( [id] => 18175640 [patent_doc_number] => 11575366 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-02-07 [patent_title] => Low power flip-flop [patent_app_type] => utility [patent_app_number] => 17/583257 [patent_app_country] => US [patent_app_date] => 2022-01-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 16 [patent_no_of_words] => 8905 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17583257 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/583257
Low power flip-flop Jan 24, 2022 Issued
Array ( [id] => 19131664 [patent_doc_number] => 20240137017 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-04-25 [patent_title] => BATTERY SWITCH DRIVING CIRCUIT [patent_app_type] => utility [patent_app_number] => 18/263393 [patent_app_country] => US [patent_app_date] => 2022-01-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4834 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18263393 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/263393
Battery switch driving circuit Jan 23, 2022 Issued
Array ( [id] => 18124712 [patent_doc_number] => 20230010324 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-01-12 [patent_title] => FPGA-BASED MULTI-CHANNEL DYNAMIC LIGHT SCATTERING AUTOCORRELATION SYSTEM AND METHOD [patent_app_type] => utility [patent_app_number] => 17/648379 [patent_app_country] => US [patent_app_date] => 2022-01-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4367 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17648379 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/648379
FPGA-based multi-channel dynamic light scattering autocorrelation system and method Jan 18, 2022 Issued
Array ( [id] => 18048585 [patent_doc_number] => 11522545 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2022-12-06 [patent_title] => Semiconductor device structure for wide supply voltage range [patent_app_type] => utility [patent_app_number] => 17/647475 [patent_app_country] => US [patent_app_date] => 2022-01-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 11 [patent_no_of_words] => 5704 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 209 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17647475 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/647475
Semiconductor device structure for wide supply voltage range Jan 9, 2022 Issued
Array ( [id] => 18123380 [patent_doc_number] => 20230008990 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-01-12 [patent_title] => Semiconductor Device Including a Level Shifter and Method of Mitigating a Delay Between Input and Output Signals [patent_app_type] => utility [patent_app_number] => 17/571690 [patent_app_country] => US [patent_app_date] => 2022-01-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7015 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17571690 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/571690
Semiconductor device including a level shifter and method of mitigating a delay between input and output signals Jan 9, 2022 Issued
Array ( [id] => 20305888 [patent_doc_number] => 12451892 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-10-21 [patent_title] => Phase-locked loop circuit and signal processing device [patent_app_type] => utility [patent_app_number] => 18/272271 [patent_app_country] => US [patent_app_date] => 2022-01-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 3456 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 280 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18272271 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/272271
Phase-locked loop circuit and signal processing device Jan 6, 2022 Issued
Array ( [id] => 18548777 [patent_doc_number] => 11722140 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-08-08 [patent_title] => Phase-locked-loop circuit employing a hybrid loop filter with sample and hold capacitors for reduced signal jitter, and related methods [patent_app_type] => utility [patent_app_number] => 17/646700 [patent_app_country] => US [patent_app_date] => 2021-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 8847 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17646700 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/646700
Phase-locked-loop circuit employing a hybrid loop filter with sample and hold capacitors for reduced signal jitter, and related methods Dec 30, 2021 Issued
Array ( [id] => 17971962 [patent_doc_number] => 11489517 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-11-01 [patent_title] => Dither generation for radio frequency sampling digital-to-analog converters [patent_app_type] => utility [patent_app_number] => 17/558794 [patent_app_country] => US [patent_app_date] => 2021-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 5012 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 184 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17558794 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/558794
Dither generation for radio frequency sampling digital-to-analog converters Dec 21, 2021 Issued
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