Patrick R. Holecek

Array ( [id] => 2717580 [patent_doc_number] => 05056013 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-10-08 [patent_title] => 'In-circuit emulator' [patent_app_type] => 1 [patent_app_number] => 7/435959 [patent_app_country] => US [patent_app_date] => 1989-11-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 3251 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/056/05056013.pdf [firstpage_image] =>[orig_patent_app_number] => 435959 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2861121 [patent_doc_number] => 05089957 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-02-18 [patent_title] => 'RAM based events counter apparatus and method' [patent_app_type] => 1 [patent_app_number] => 7/436212 [patent_app_country] => US [patent_app_date] => 1989-11-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 14 [patent_no_of_words] => 5479 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 317 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/089/05089957.pdf [firstpage_image] =>[orig_patent_app_number] => 436212 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2816011 [patent_doc_number] => 05125080 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-06-23 [patent_title] => 'Logic support chip for AT-type computer with improved bus architecture' [patent_app_type] => 1 [patent_app_number] => 7/436200 [patent_app_country] => US [patent_app_date] => 1989-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 3833 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 308 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/125/05125080.pdf [firstpage_image] =>[orig_patent_app_number] => 436200 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2717523 [patent_doc_number] => 05056010 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-10-08 [patent_title] => 'Pointer based DMA controller' [patent_app_type] => 1 [patent_app_number] => 7/429284 [patent_app_country] => US [patent_app_date] => 1989-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 40 [patent_no_of_words] => 5826 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 372 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/056/05056010.pdf [firstpage_image] =>[orig_patent_app_number] => 429284 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3108470 [patent_doc_number] => 05293493 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-03-08 [patent_title] => 'Preemption control for central processor with cache' [patent_app_type] => 1 [patent_app_number] => 7/428259 [patent_app_country] => US [patent_app_date] => 1989-10-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 1830 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 17 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/293/05293493.pdf [firstpage_image] =>[orig_patent_app_number] => 428259 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2799970 [patent_doc_number] => 05101482 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-03-31 [patent_title] => 'Bus-based priority arbitration system with optimum codewords' [patent_app_type] => 1 [patent_app_number] => 7/422158 [patent_app_country] => US [patent_app_date] => 1989-10-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 7563 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 283 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/101/05101482.pdf [firstpage_image] =>[orig_patent_app_number] => 422158 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2904855 [patent_doc_number] => 05210836 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-05-11 [patent_title] => 'Instruction generator architecture for a video signal processor controller' [patent_app_type] => 1 [patent_app_number] => 7/421500 [patent_app_country] => US [patent_app_date] => 1989-10-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 48 [patent_figures_cnt] => 77 [patent_no_of_words] => 32840 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 382 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/210/05210836.pdf [firstpage_image] =>[orig_patent_app_number] => 421500 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2788117 [patent_doc_number] => 05133056 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-07-21 [patent_title] => 'Interrupt controller' [patent_app_type] => 1 [patent_app_number] => 7/402754 [patent_app_country] => US [patent_app_date] => 1989-09-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 2011 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 235 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/133/05133056.pdf [firstpage_image] =>[orig_patent_app_number] => 402754 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2816852 [patent_doc_number] => 05146567 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-09-08 [patent_title] => 'Keyboard interface' [patent_app_type] => 1 [patent_app_number] => 7/397000 [patent_app_country] => US [patent_app_date] => 1989-08-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 4370 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/146/05146567.pdf [firstpage_image] =>[orig_patent_app_number] => 397000 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3004126 [patent_doc_number] => 05347637 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-09-13 [patent_title] => 'Modular input/output system for supercomputers' [patent_app_type] => 1 [patent_app_number] => 7/390722 [patent_app_country] => US [patent_app_date] => 1989-08-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2725 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 244 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/347/05347637.pdf [firstpage_image] =>[orig_patent_app_number] => 390722 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2816047 [patent_doc_number] => 05125082 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-06-23 [patent_title] => 'Management system capable of quickly assigning a terminal endpoint identifier to a terminal equipment unit' [patent_app_type] => 1 [patent_app_number] => 7/367180 [patent_app_country] => US [patent_app_date] => 1989-06-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4469 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 328 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/125/05125082.pdf [firstpage_image] =>[orig_patent_app_number] => 367180 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2985149 [patent_doc_number] => 05182809 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-01-26 [patent_title] => 'Dual bus microcomputer system with programmable control of lock function' [patent_app_type] => 1 [patent_app_number] => 7/358810 [patent_app_country] => US [patent_app_date] => 1989-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 2537 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/182/05182809.pdf [firstpage_image] =>[orig_patent_app_number] => 358810 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2688843 [patent_doc_number] => 05067084 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-11-19 [patent_title] => 'Inertial measurement unit with aiding from roll isolated gyro' [patent_app_type] => 1 [patent_app_number] => 7/357383 [patent_app_country] => US [patent_app_date] => 1989-05-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2312 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 281 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/067/05067084.pdf [firstpage_image] =>[orig_patent_app_number] => 357383 [rel_patent_id] =>[rel_patent_doc_number] =>)