Paul A. Budd

Array ( [id] => 4775914 [patent_doc_number] => 20080283912 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-11-20 [patent_title] => 'Semiconductor device having super junction structure and method of manufacturing the same' [patent_app_type] => utility [patent_app_number] => 12/153032 [patent_app_country] => US [patent_app_date] => 2008-05-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4883 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0283/20080283912.pdf [firstpage_image] =>[orig_patent_app_number] => 12153032 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4558265 [patent_doc_number] => 07821099 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-10-26 [patent_title] => 'Structure for low capacitance ESD robust diodes' [patent_app_type] => utility [patent_app_number] => 12/118875 [patent_app_country] => US [patent_app_date] => 2008-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5214 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/821/07821099.pdf [firstpage_image] =>[orig_patent_app_number] => 12118875 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 246967 [patent_doc_number] => 07585719 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-09-08 [patent_title] => 'Integrated circuit with multi-length output transistor segments' [patent_app_type] => utility [patent_app_number] => 12/151598 [patent_app_country] => US [patent_app_date] => 2008-05-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3319 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 195 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/585/07585719.pdf [firstpage_image] =>[orig_patent_app_number] => 12151598 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5282364 [patent_doc_number] => 20090096038 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-04-16 [patent_title] => 'POWER MOSFET ARRAY' [patent_app_type] => utility [patent_app_number] => 12/115552 [patent_app_country] => US [patent_app_date] => 2008-05-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2763 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0096/20090096038.pdf [firstpage_image] =>[orig_patent_app_number] => 12115552 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4836804 [patent_doc_number] => 20080277710 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-11-13 [patent_title] => 'SEMICONDUCTOR DEVICES AND METHODS OF FORMING THE SAME' [patent_app_type] => utility [patent_app_number] => 12/115745 [patent_app_country] => US [patent_app_date] => 2008-05-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 16062 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0277/20080277710.pdf [firstpage_image] =>[orig_patent_app_number] => 12115745 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4737110 [patent_doc_number] => 20080230762 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-09-25 [patent_title] => 'PHASE CHANGE MEMORY ELEMENTS HAVING A CONFINED PORTION OF PHASE CHANGE MATERIAL ON A RECESSED CONTACT' [patent_app_type] => utility [patent_app_number] => 12/113846 [patent_app_country] => US [patent_app_date] => 2008-05-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 7523 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0230/20080230762.pdf [firstpage_image] =>[orig_patent_app_number] => 12113846 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 141918 [patent_doc_number] => 07691702 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-04-06 [patent_title] => 'Method of manufacture of an apparatus for increasing stability of MOS memory cells' [patent_app_type] => utility [patent_app_number] => 12/109327 [patent_app_country] => US [patent_app_date] => 2008-04-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 5383 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/691/07691702.pdf [firstpage_image] =>[orig_patent_app_number] => 12109327 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10099661 [patent_doc_number] => 09135977 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-09-15 [patent_title] => 'Random access memories with an increased stability of the MOS memory cell' [patent_app_type] => utility [patent_app_number] => 12/109329 [patent_app_country] => US [patent_app_date] => 2008-04-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 5382 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 381 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12109329 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4856464 [patent_doc_number] => 20080265314 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-10-30 [patent_title] => 'Semiconductor device having vertical MOSFET and method of manufacturing the same' [patent_app_type] => utility [patent_app_number] => 12/081931 [patent_app_country] => US [patent_app_date] => 2008-04-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 33 [patent_figures_cnt] => 33 [patent_no_of_words] => 9642 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0265/20080265314.pdf [firstpage_image] =>[orig_patent_app_number] => 12081931 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5493373 [patent_doc_number] => 20090261401 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-10-22 [patent_title] => 'NON-VOLATILE MEMORY CELL AND METHOD OF FABRICATING THE SAME' [patent_app_type] => utility [patent_app_number] => 12/104452 [patent_app_country] => US [patent_app_date] => 2008-04-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2457 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0261/20090261401.pdf [firstpage_image] =>[orig_patent_app_number] => 12104452 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8029143 [patent_doc_number] => 08143658 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-03-27 [patent_title] => 'Charge storage nanostructure' [patent_app_type] => utility [patent_app_number] => 12/450373 [patent_app_country] => US [patent_app_date] => 2008-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 2757 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/143/08143658.pdf [firstpage_image] =>[orig_patent_app_number] => 12450373 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4715144 [patent_doc_number] => 20080237666 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-10-02 [patent_title] => 'Solid-state imaging element and method for producing the same' [patent_app_type] => utility [patent_app_number] => 12/076792 [patent_app_country] => US [patent_app_date] => 2008-03-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5614 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0237/20080237666.pdf [firstpage_image] =>[orig_patent_app_number] => 12076792 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4582719 [patent_doc_number] => 07851296 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-12-14 [patent_title] => 'Nonvolatile semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 12/076522 [patent_app_country] => US [patent_app_date] => 2008-03-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 47 [patent_figures_cnt] => 112 [patent_no_of_words] => 27740 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/851/07851296.pdf [firstpage_image] =>[orig_patent_app_number] => 12076522 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5542766 [patent_doc_number] => 20090152643 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-06-18 [patent_title] => 'Semiconductor structures' [patent_app_type] => utility [patent_app_number] => 12/073762 [patent_app_country] => US [patent_app_date] => 2008-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1797 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0152/20090152643.pdf [firstpage_image] =>[orig_patent_app_number] => 12073762 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4723837 [patent_doc_number] => 20080203378 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-08-28 [patent_title] => 'SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 12/037402 [patent_app_country] => US [patent_app_date] => 2008-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 31 [patent_figures_cnt] => 31 [patent_no_of_words] => 13143 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0203/20080203378.pdf [firstpage_image] =>[orig_patent_app_number] => 12037402 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4679866 [patent_doc_number] => 20080246092 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-10-09 [patent_title] => 'Semiconductor device structure with strain layer and method of fabricating the semiconductor device structure' [patent_app_type] => utility [patent_app_number] => 12/072445 [patent_app_country] => US [patent_app_date] => 2008-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3018 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0246/20080246092.pdf [firstpage_image] =>[orig_patent_app_number] => 12072445 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5512038 [patent_doc_number] => 20090212342 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-08-27 [patent_title] => 'Asymmetric Single Poly NMOS Non-Volatile Memory Cell' [patent_app_type] => utility [patent_app_number] => 12/037051 [patent_app_country] => US [patent_app_date] => 2008-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 8735 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0212/20090212342.pdf [firstpage_image] =>[orig_patent_app_number] => 12037051 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10838512 [patent_doc_number] => 08866191 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-10-21 [patent_title] => 'HEMT semiconductor component with field plates' [patent_app_type] => utility [patent_app_number] => 12/449700 [patent_app_country] => US [patent_app_date] => 2008-02-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3585 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12449700 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4499208 [patent_doc_number] => 07948019 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-05-24 [patent_title] => 'Nonvolatile memory devices and methods of operating the same' [patent_app_type] => utility [patent_app_number] => 12/071451 [patent_app_country] => US [patent_app_date] => 2008-02-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 20 [patent_no_of_words] => 6274 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/948/07948019.pdf [firstpage_image] =>[orig_patent_app_number] => 12071451 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4576500 [patent_doc_number] => 07829929 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-11-09 [patent_title] => 'Non-volatile memory device and non-volatile semiconductor integrated circuit device, including the same' [patent_app_type] => utility [patent_app_number] => 12/070422 [patent_app_country] => US [patent_app_date] => 2008-02-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 29 [patent_no_of_words] => 9193 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/829/07829929.pdf [firstpage_image] =>[orig_patent_app_number] => 12070422 [rel_patent_id] =>[rel_patent_doc_number] =>)