Search

Paul A. Budd

Examiner (ID: 16043)

Most Active Art Unit
2815
Art Unit(s)
2815
Total Applications
569
Issued Applications
466
Pending Applications
2
Abandoned Applications
101

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 4829254 [patent_doc_number] => 20080128787 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-06-05 [patent_title] => 'Semiconductor device and manufacturing method thereof' [patent_app_type] => utility [patent_app_number] => 11/998621 [patent_app_country] => US [patent_app_date] => 2007-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 25 [patent_no_of_words] => 8906 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0128/20080128787.pdf [firstpage_image] =>[orig_patent_app_number] => 11998621 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/998621
CMOS semiconductor non-volatile memory device Nov 29, 2007 Issued
Array ( [id] => 141689 [patent_doc_number] => 07687346 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-03-30 [patent_title] => 'Method of manufacturing a non-volatile NAND memory semiconductor integrated circuit' [patent_app_type] => utility [patent_app_number] => 11/943325 [patent_app_country] => US [patent_app_date] => 2007-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 45 [patent_no_of_words] => 14970 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/687/07687346.pdf [firstpage_image] =>[orig_patent_app_number] => 11943325 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/943325
Method of manufacturing a non-volatile NAND memory semiconductor integrated circuit Nov 19, 2007 Issued
Array ( [id] => 62739 [patent_doc_number] => 07763491 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-07-27 [patent_title] => 'Method for manufacturing image sensor' [patent_app_type] => utility [patent_app_number] => 11/943081 [patent_app_country] => US [patent_app_date] => 2007-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 1829 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/763/07763491.pdf [firstpage_image] =>[orig_patent_app_number] => 11943081 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/943081
Method for manufacturing image sensor Nov 19, 2007 Issued
Array ( [id] => 299805 [patent_doc_number] => 07538004 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-05-26 [patent_title] => 'Method of fabrication for SiGe heterojunction bipolar transistor (HBT)' [patent_app_type] => utility [patent_app_number] => 11/937534 [patent_app_country] => US [patent_app_date] => 2007-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 8 [patent_no_of_words] => 4163 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/538/07538004.pdf [firstpage_image] =>[orig_patent_app_number] => 11937534 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/937534
Method of fabrication for SiGe heterojunction bipolar transistor (HBT) Nov 8, 2007 Issued
Array ( [id] => 4789416 [patent_doc_number] => 20080290389 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-11-27 [patent_title] => 'DYNAMIC RANDOM ACCESS MEMORY AND MANUFACTURING METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 11/937502 [patent_app_country] => US [patent_app_date] => 2007-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 5735 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0290/20080290389.pdf [firstpage_image] =>[orig_patent_app_number] => 11937502 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/937502
Dynamic random access memory Nov 8, 2007 Issued
Array ( [id] => 83459 [patent_doc_number] => 07741181 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-06-22 [patent_title] => 'Methods of forming mixed gate CMOS with single poly deposition' [patent_app_type] => utility [patent_app_number] => 11/936061 [patent_app_country] => US [patent_app_date] => 2007-11-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 12 [patent_no_of_words] => 5024 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/741/07741181.pdf [firstpage_image] =>[orig_patent_app_number] => 11936061 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/936061
Methods of forming mixed gate CMOS with single poly deposition Nov 5, 2007 Issued
Array ( [id] => 4922077 [patent_doc_number] => 20080070392 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-03-20 [patent_title] => 'Controlling diffusion in doped semiconductor regions' [patent_app_type] => utility [patent_app_number] => 11/982107 [patent_app_country] => US [patent_app_date] => 2007-11-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5855 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0070/20080070392.pdf [firstpage_image] =>[orig_patent_app_number] => 11982107 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/982107
Controlling diffusion in doped semiconductor regions Oct 31, 2007 Issued
Array ( [id] => 133718 [patent_doc_number] => 07696508 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-04-13 [patent_title] => 'Phase change memory devices having dual lower electrodes' [patent_app_type] => utility [patent_app_number] => 11/932781 [patent_app_country] => US [patent_app_date] => 2007-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 7660 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/696/07696508.pdf [firstpage_image] =>[orig_patent_app_number] => 11932781 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/932781
Phase change memory devices having dual lower electrodes Oct 30, 2007 Issued
Array ( [id] => 4749111 [patent_doc_number] => 20080157182 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-07-03 [patent_title] => 'Semiconductor device and method of fabricating the same' [patent_app_type] => utility [patent_app_number] => 11/980632 [patent_app_country] => US [patent_app_date] => 2007-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5398 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0157/20080157182.pdf [firstpage_image] =>[orig_patent_app_number] => 11980632 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/980632
Semiconductor device Oct 30, 2007 Issued
Array ( [id] => 152280 [patent_doc_number] => 07683408 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-03-23 [patent_title] => 'Image sensor' [patent_app_type] => utility [patent_app_number] => 11/923362 [patent_app_country] => US [patent_app_date] => 2007-10-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 3969 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/683/07683408.pdf [firstpage_image] =>[orig_patent_app_number] => 11923362 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/923362
Image sensor Oct 23, 2007 Issued
Array ( [id] => 5282277 [patent_doc_number] => 20090095951 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-04-16 [patent_title] => 'Memory Device With Low Reset Current' [patent_app_type] => utility [patent_app_number] => 11/871761 [patent_app_country] => US [patent_app_date] => 2007-10-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 8993 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0095/20090095951.pdf [firstpage_image] =>[orig_patent_app_number] => 11871761 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/871761
Memory device with low reset current Oct 11, 2007 Issued
Array ( [id] => 113859 [patent_doc_number] => 07714408 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-05-11 [patent_title] => 'Semiconductor device and manufacturing method thereof' [patent_app_type] => utility [patent_app_number] => 11/905652 [patent_app_country] => US [patent_app_date] => 2007-10-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 36 [patent_no_of_words] => 17185 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/714/07714408.pdf [firstpage_image] =>[orig_patent_app_number] => 11905652 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/905652
Semiconductor device and manufacturing method thereof Oct 2, 2007 Issued
Array ( [id] => 91943 [patent_doc_number] => 07732277 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-06-08 [patent_title] => 'Semiconductor device and method of fabricating the same' [patent_app_type] => utility [patent_app_number] => 11/902752 [patent_app_country] => US [patent_app_date] => 2007-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 17 [patent_no_of_words] => 3308 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/732/07732277.pdf [firstpage_image] =>[orig_patent_app_number] => 11902752 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/902752
Semiconductor device and method of fabricating the same Sep 24, 2007 Issued
Array ( [id] => 4656204 [patent_doc_number] => 20080025065 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-01-31 [patent_title] => 'FERROELECTRIC MEMORY DEVICES HAVING EXPANDED PLATE LINES' [patent_app_type] => utility [patent_app_number] => 11/859958 [patent_app_country] => US [patent_app_date] => 2007-09-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 5357 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0025/20080025065.pdf [firstpage_image] =>[orig_patent_app_number] => 11859958 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/859958
Ferroelectric memory devices having expanded plate lines Sep 23, 2007 Issued
Array ( [id] => 5505717 [patent_doc_number] => 20090078924 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-03-26 [patent_title] => 'Phase Change Memory with Various Grain Sizes' [patent_app_type] => utility [patent_app_number] => 11/858712 [patent_app_country] => US [patent_app_date] => 2007-09-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 3678 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0078/20090078924.pdf [firstpage_image] =>[orig_patent_app_number] => 11858712 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/858712
Phase change memory with various grain sizes Sep 19, 2007 Issued
Array ( [id] => 23271 [patent_doc_number] => 07800155 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-09-21 [patent_title] => 'Semiconductor device' [patent_app_type] => utility [patent_app_number] => 11/858585 [patent_app_country] => US [patent_app_date] => 2007-09-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 13 [patent_no_of_words] => 4274 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 325 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/800/07800155.pdf [firstpage_image] =>[orig_patent_app_number] => 11858585 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/858585
Semiconductor device Sep 19, 2007 Issued
Array ( [id] => 5268443 [patent_doc_number] => 20090072218 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-03-19 [patent_title] => 'Higher threshold voltage phase change memory' [patent_app_type] => utility [patent_app_number] => 11/901492 [patent_app_country] => US [patent_app_date] => 2007-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2678 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0072/20090072218.pdf [firstpage_image] =>[orig_patent_app_number] => 11901492 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/901492
Higher threshold voltage phase change memory Sep 17, 2007 Abandoned
Array ( [id] => 4775874 [patent_doc_number] => 20080283872 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-11-20 [patent_title] => 'Variable path wiring cell, semiconductor integrated circuit designing method thereof, and forming method of variable path wiring cell' [patent_app_type] => utility [patent_app_number] => 11/898696 [patent_app_country] => US [patent_app_date] => 2007-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 23 [patent_no_of_words] => 12124 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0283/20080283872.pdf [firstpage_image] =>[orig_patent_app_number] => 11898696 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/898696
Variable path wiring cell, semiconductor integrated circuit designing method thereof, and forming method of variable path wiring cell Sep 13, 2007 Abandoned
Array ( [id] => 4701798 [patent_doc_number] => 20080061320 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-03-13 [patent_title] => 'Transistor, Memory Cell Array and Method of Manufacturing a Transistor' [patent_app_type] => utility [patent_app_number] => 11/851510 [patent_app_country] => US [patent_app_date] => 2007-09-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 6982 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0061/20080061320.pdf [firstpage_image] =>[orig_patent_app_number] => 11851510 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/851510
Method of manufacturing a transistor and memory cell array Sep 6, 2007 Issued
Array ( [id] => 5413444 [patent_doc_number] => 20090039331 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-02-12 [patent_title] => 'PHASE CHANGE MATERIAL STRUCTURES' [patent_app_type] => utility [patent_app_number] => 11/834851 [patent_app_country] => US [patent_app_date] => 2007-08-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1920 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0039/20090039331.pdf [firstpage_image] =>[orig_patent_app_number] => 11834851 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/834851
PHASE CHANGE MATERIAL STRUCTURES Aug 6, 2007 Abandoned
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