
Paul A. Budd
Examiner (ID: 16043)
| Most Active Art Unit | 2815 |
| Art Unit(s) | 2815 |
| Total Applications | 569 |
| Issued Applications | 466 |
| Pending Applications | 2 |
| Abandoned Applications | 101 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 7022925
[patent_doc_number] => 20050017319
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-01-27
[patent_title] => 'Semiconductor device and production method therefor'
[patent_app_type] => utility
[patent_app_number] => 10/489522
[patent_app_country] => US
[patent_app_date] => 2003-03-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 13139
[patent_no_of_claims] => 53
[patent_no_of_ind_claims] => 9
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0017/20050017319.pdf
[firstpage_image] =>[orig_patent_app_number] => 10489522
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/489522 | High dielectric constant MOSFET device | Mar 26, 2003 | Issued |
Array
(
[id] => 401528
[patent_doc_number] => 07291895
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2007-11-06
[patent_title] => 'Integrated circuitry'
[patent_app_type] => utility
[patent_app_number] => 10/391952
[patent_app_country] => US
[patent_app_date] => 2003-03-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 12
[patent_no_of_words] => 2972
[patent_no_of_claims] => 44
[patent_no_of_ind_claims] => 10
[patent_words_short_claim] => 84
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/291/07291895.pdf
[firstpage_image] =>[orig_patent_app_number] => 10391952
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/391952 | Integrated circuitry | Mar 17, 2003 | Issued |
Array
(
[id] => 609437
[patent_doc_number] => 07151011
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-12-19
[patent_title] => 'Integrated circuit die having an interference shield'
[patent_app_type] => utility
[patent_app_number] => 10/243487
[patent_app_country] => US
[patent_app_date] => 2002-09-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 9
[patent_no_of_words] => 3196
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 109
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/151/07151011.pdf
[firstpage_image] =>[orig_patent_app_number] => 10243487
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/243487 | Integrated circuit die having an interference shield | Sep 12, 2002 | Issued |
Array
(
[id] => 7273046
[patent_doc_number] => 20040232497
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-11-25
[patent_title] => 'Semiconductor device and method for manufacturing the same'
[patent_app_type] => new
[patent_app_number] => 10/488401
[patent_app_country] => US
[patent_app_date] => 2004-06-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 42
[patent_figures_cnt] => 42
[patent_no_of_words] => 29485
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 8
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0232/20040232497.pdf
[firstpage_image] =>[orig_patent_app_number] => 10488401
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/488401 | Semiconductor device having plural dram memory cells and a logic circuit | Dec 13, 2001 | Issued |
Array
(
[id] => 7040001
[patent_doc_number] => 20010005020
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2001-06-28
[patent_title] => 'Thin film transistor and method of fabricating the same'
[patent_app_type] => new-utility
[patent_app_number] => 09/753397
[patent_app_country] => US
[patent_app_date] => 2001-01-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 4507
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 43
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0005/20010005020.pdf
[firstpage_image] =>[orig_patent_app_number] => 09753397
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/753397 | Thin film transistor and method of fabricating the same | Jan 2, 2001 | Abandoned |
Array
(
[id] => 824507
[patent_doc_number] => 07405982
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2008-07-29
[patent_title] => 'Methods to improve the operation of SOI devices'
[patent_app_type] => utility
[patent_app_number] => 09/588351
[patent_app_country] => US
[patent_app_date] => 2000-06-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 7
[patent_no_of_words] => 4200
[patent_no_of_claims] => 2
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 109
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/405/07405982.pdf
[firstpage_image] =>[orig_patent_app_number] => 09588351
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/588351 | Methods to improve the operation of SOI devices | Jun 6, 2000 | Issued |
Array
(
[id] => 256723
[patent_doc_number] => 07576400
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2009-08-18
[patent_title] => 'Circuitry and gate stacks'
[patent_app_type] => utility
[patent_app_number] => 09/559903
[patent_app_country] => US
[patent_app_date] => 2000-04-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 6
[patent_no_of_words] => 2710
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 146
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/576/07576400.pdf
[firstpage_image] =>[orig_patent_app_number] => 09559903
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/559903 | Circuitry and gate stacks | Apr 25, 2000 | Issued |