Search

Paul A. Wartalowicz

Examiner (ID: 2067, Phone: (571)272-5957 , Office: P/1735 )

Most Active Art Unit
1735
Art Unit(s)
1735, 1754, 1793
Total Applications
1173
Issued Applications
607
Pending Applications
174
Abandoned Applications
411

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 7631363 [patent_doc_number] => 06635569 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-10-21 [patent_title] => 'Method of passivating and stabilizing a Ti-PECVD process chamber and combined Ti-PECVD/TiN-CVD processing method and apparatus' [patent_app_type] => B1 [patent_app_number] => 09/063196 [patent_app_country] => US [patent_app_date] => 1998-04-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 6465 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 24 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/635/06635569.pdf [firstpage_image] =>[orig_patent_app_number] => 09063196 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/063196
Method of passivating and stabilizing a Ti-PECVD process chamber and combined Ti-PECVD/TiN-CVD processing method and apparatus Apr 19, 1998 Issued
Array ( [id] => 4098346 [patent_doc_number] => 06048804 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-04-11 [patent_title] => 'Process for producing nanoporous silica thin films' [patent_app_type] => 1 [patent_app_number] => 9/054262 [patent_app_country] => US [patent_app_date] => 1998-04-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 6933 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/048/06048804.pdf [firstpage_image] =>[orig_patent_app_number] => 054262 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/054262
Process for producing nanoporous silica thin films Apr 2, 1998 Issued
Array ( [id] => 4257640 [patent_doc_number] => 06204080 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-03-20 [patent_title] => 'Method for manufacturing thin film actuated mirror array in an optical projection system' [patent_app_type] => 1 [patent_app_number] => 9/050910 [patent_app_country] => US [patent_app_date] => 1998-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 16 [patent_no_of_words] => 9306 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 265 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/204/06204080.pdf [firstpage_image] =>[orig_patent_app_number] => 050910 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/050910
Method for manufacturing thin film actuated mirror array in an optical projection system Mar 30, 1998 Issued
Array ( [id] => 1424724 [patent_doc_number] => 06503850 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-01-07 [patent_title] => 'Process for producing nanoporous dielectric films at high pH' [patent_app_type] => B1 [patent_app_number] => 09/046473 [patent_app_country] => US [patent_app_date] => 1998-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 5689 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/503/06503850.pdf [firstpage_image] =>[orig_patent_app_number] => 09046473 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/046473
Process for producing nanoporous dielectric films at high pH Mar 24, 1998 Issued
Array ( [id] => 4084725 [patent_doc_number] => 06162743 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-12-19 [patent_title] => 'Low dielectric constant film and method thereof' [patent_app_type] => 1 [patent_app_number] => 9/021716 [patent_app_country] => US [patent_app_date] => 1998-02-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5465 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 28 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/162/06162743.pdf [firstpage_image] =>[orig_patent_app_number] => 021716 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/021716
Low dielectric constant film and method thereof Feb 9, 1998 Issued
Array ( [id] => 4423790 [patent_doc_number] => 06177730 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-01-23 [patent_title] => 'Semiconductor bare chip, method of manufacturing semiconductor bare chip and mounting structure of semiconductor bare chip' [patent_app_type] => 1 [patent_app_number] => 9/021407 [patent_app_country] => US [patent_app_date] => 1998-02-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 14 [patent_no_of_words] => 3297 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/177/06177730.pdf [firstpage_image] =>[orig_patent_app_number] => 021407 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/021407
Semiconductor bare chip, method of manufacturing semiconductor bare chip and mounting structure of semiconductor bare chip Feb 9, 1998 Issued
09/019900 PRODUCING A THIN FILM HAVING A LOW DIELECTRIC CONSTANT USING HDP-CVD Feb 5, 1998 Abandoned
Array ( [id] => 4232414 [patent_doc_number] => 06117702 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-09-12 [patent_title] => 'Process for making semiconductor photo detector containing crystalline amplification layer' [patent_app_type] => 1 [patent_app_number] => 9/017795 [patent_app_country] => US [patent_app_date] => 1998-02-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 14 [patent_no_of_words] => 13517 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/117/06117702.pdf [firstpage_image] =>[orig_patent_app_number] => 017795 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/017795
Process for making semiconductor photo detector containing crystalline amplification layer Feb 2, 1998 Issued
Array ( [id] => 4215868 [patent_doc_number] => 06087263 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-07-11 [patent_title] => 'Methods of forming integrated circuitry and integrated circuitry structures' [patent_app_type] => 1 [patent_app_number] => 9/018208 [patent_app_country] => US [patent_app_date] => 1998-01-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 35 [patent_no_of_words] => 3299 [patent_no_of_claims] => 53 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/087/06087263.pdf [firstpage_image] =>[orig_patent_app_number] => 018208 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/018208
Methods of forming integrated circuitry and integrated circuitry structures Jan 28, 1998 Issued
Array ( [id] => 4356950 [patent_doc_number] => 06190955 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-02-20 [patent_title] => 'Fabrication of trench capacitors using disposable hard mask' [patent_app_type] => 1 [patent_app_number] => 9/014433 [patent_app_country] => US [patent_app_date] => 1998-01-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2364 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/190/06190955.pdf [firstpage_image] =>[orig_patent_app_number] => 014433 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/014433
Fabrication of trench capacitors using disposable hard mask Jan 26, 1998 Issued
Array ( [id] => 4406346 [patent_doc_number] => 06171957 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-01-09 [patent_title] => 'Manufacturing method of semiconductor device having high pressure reflow process' [patent_app_type] => 1 [patent_app_number] => 9/009176 [patent_app_country] => US [patent_app_date] => 1998-01-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 10 [patent_no_of_words] => 4387 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 178 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/171/06171957.pdf [firstpage_image] =>[orig_patent_app_number] => 009176 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/009176
Manufacturing method of semiconductor device having high pressure reflow process Jan 19, 1998 Issued
Array ( [id] => 4364765 [patent_doc_number] => 06191474 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-02-20 [patent_title] => 'Vertically mountable interposer assembly and method' [patent_app_type] => 1 [patent_app_number] => 9/001406 [patent_app_country] => US [patent_app_date] => 1997-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 26 [patent_no_of_words] => 3980 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/191/06191474.pdf [firstpage_image] =>[orig_patent_app_number] => 001406 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/001406
Vertically mountable interposer assembly and method Dec 30, 1997 Issued
Array ( [id] => 4188060 [patent_doc_number] => 06153461 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-11-28 [patent_title] => 'Manufacturing method of a dielectric layer for DRAM capacitors' [patent_app_type] => 1 [patent_app_number] => 8/997496 [patent_app_country] => US [patent_app_date] => 1997-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 1775 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/153/06153461.pdf [firstpage_image] =>[orig_patent_app_number] => 997496 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/997496
Manufacturing method of a dielectric layer for DRAM capacitors Dec 22, 1997 Issued
Array ( [id] => 4294995 [patent_doc_number] => 06184156 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-02-06 [patent_title] => 'Process and system for flattening secondary edgebeads on resist coated wafers' [patent_app_type] => 1 [patent_app_number] => 8/989850 [patent_app_country] => US [patent_app_date] => 1997-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 12 [patent_no_of_words] => 3453 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/184/06184156.pdf [firstpage_image] =>[orig_patent_app_number] => 989850 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/989850
Process and system for flattening secondary edgebeads on resist coated wafers Dec 11, 1997 Issued
Array ( [id] => 4405254 [patent_doc_number] => 06232167 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-05-15 [patent_title] => 'Method of producing a ferroelectric thin film coated substrate' [patent_app_type] => 1 [patent_app_number] => 8/968938 [patent_app_country] => US [patent_app_date] => 1997-11-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 7279 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/232/06232167.pdf [firstpage_image] =>[orig_patent_app_number] => 968938 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/968938
Method of producing a ferroelectric thin film coated substrate Nov 11, 1997 Issued
Array ( [id] => 4155132 [patent_doc_number] => 06103638 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-08-15 [patent_title] => 'Formation of planar dielectric layers using liquid interfaces' [patent_app_type] => 1 [patent_app_number] => 8/967354 [patent_app_country] => US [patent_app_date] => 1997-11-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 6169 [patent_no_of_claims] => 58 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/103/06103638.pdf [firstpage_image] =>[orig_patent_app_number] => 967354 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/967354
Formation of planar dielectric layers using liquid interfaces Nov 6, 1997 Issued
Array ( [id] => 4419920 [patent_doc_number] => 06177360 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-01-23 [patent_title] => 'Process for manufacture of integrated circuit device' [patent_app_type] => 1 [patent_app_number] => 8/965384 [patent_app_country] => US [patent_app_date] => 1997-11-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 8 [patent_no_of_words] => 2277 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/177/06177360.pdf [firstpage_image] =>[orig_patent_app_number] => 965384 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/965384
Process for manufacture of integrated circuit device Nov 5, 1997 Issued
Array ( [id] => 4081402 [patent_doc_number] => 06054395 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-04-25 [patent_title] => 'Method of patterning a semiconductor device' [patent_app_type] => 1 [patent_app_number] => 8/957210 [patent_app_country] => US [patent_app_date] => 1997-10-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 3050 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 42 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/054/06054395.pdf [firstpage_image] =>[orig_patent_app_number] => 957210 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/957210
Method of patterning a semiconductor device Oct 23, 1997 Issued
08/925049 SEMICONDUCTOR DEVICE AND METHOD FOR PRODUCTION THEREOF Sep 7, 1997 Abandoned
Array ( [id] => 4190952 [patent_doc_number] => 06043119 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-03-28 [patent_title] => 'Method of making a capacitor' [patent_app_type] => 1 [patent_app_number] => 8/906213 [patent_app_country] => US [patent_app_date] => 1997-08-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 17 [patent_no_of_words] => 5614 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/043/06043119.pdf [firstpage_image] =>[orig_patent_app_number] => 906213 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/906213
Method of making a capacitor Aug 3, 1997 Issued
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