
Paul Alvare
Examiner (ID: 6865, Phone: (571)272-8611 , Office: P/3744 )
| Most Active Art Unit | 3763 |
| Art Unit(s) | 3763, 3744 |
| Total Applications | 697 |
| Issued Applications | 343 |
| Pending Applications | 90 |
| Abandoned Applications | 282 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 15641459
[patent_doc_number] => 10593740
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-03-17
[patent_title] => Display panel and manufacturing process thereof
[patent_app_type] => utility
[patent_app_number] => 16/460741
[patent_app_country] => US
[patent_app_date] => 2019-07-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 4145
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 106
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16460741
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/460741 | Display panel and manufacturing process thereof | Jul 1, 2019 | Issued |
Array
(
[id] => 15030509
[patent_doc_number] => 20190326259
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-10-24
[patent_title] => Devices Employing Thermal and Mechanical Enhanced Layers and Methods of Forming Same
[patent_app_type] => utility
[patent_app_number] => 16/458877
[patent_app_country] => US
[patent_app_date] => 2019-07-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5031
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 79
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16458877
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/458877 | Devices employing thermal and mechanical enhanced layers and methods of forming same | Jun 30, 2019 | Issued |
Array
(
[id] => 15000331
[patent_doc_number] => 20190319123
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-10-17
[patent_title] => Semiconductor Device Having an Active Trench and a Body Trench
[patent_app_type] => utility
[patent_app_number] => 16/456895
[patent_app_country] => US
[patent_app_date] => 2019-06-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8353
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -22
[patent_words_short_claim] => 242
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16456895
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/456895 | Semiconductor device having an active trench and a body trench | Jun 27, 2019 | Issued |
Array
(
[id] => 14969231
[patent_doc_number] => 20190312094
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-10-10
[patent_title] => DISPLAY DEVICE
[patent_app_type] => utility
[patent_app_number] => 16/440568
[patent_app_country] => US
[patent_app_date] => 2019-06-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 12565
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -16
[patent_words_short_claim] => 138
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16440568
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/440568 | Display device | Jun 12, 2019 | Issued |
Array
(
[id] => 16911541
[patent_doc_number] => 11043591
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-06-22
[patent_title] => FeFET transistor
[patent_app_type] => utility
[patent_app_number] => 16/437067
[patent_app_country] => US
[patent_app_date] => 2019-06-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 9
[patent_no_of_words] => 2353
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 131
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16437067
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/437067 | FeFET transistor | Jun 10, 2019 | Issued |
Array
(
[id] => 16699856
[patent_doc_number] => 10950464
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-03-16
[patent_title] => Electronic device module and manufacturing method thereof
[patent_app_type] => utility
[patent_app_number] => 16/437410
[patent_app_country] => US
[patent_app_date] => 2019-06-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 6223
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 112
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16437410
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/437410 | Electronic device module and manufacturing method thereof | Jun 10, 2019 | Issued |
Array
(
[id] => 16645582
[patent_doc_number] => 10923450
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-02-16
[patent_title] => Memory arrays with bonded and shared logic circuitry
[patent_app_type] => utility
[patent_app_number] => 16/437445
[patent_app_country] => US
[patent_app_date] => 2019-06-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 21
[patent_figures_cnt] => 24
[patent_no_of_words] => 13351
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 71
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16437445
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/437445 | Memory arrays with bonded and shared logic circuitry | Jun 10, 2019 | Issued |
Array
(
[id] => 16280347
[patent_doc_number] => 10763389
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2020-09-01
[patent_title] => LED structure with minimized light emission area
[patent_app_type] => utility
[patent_app_number] => 16/437567
[patent_app_country] => US
[patent_app_date] => 2019-06-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 13
[patent_no_of_words] => 8321
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 133
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16437567
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/437567 | LED structure with minimized light emission area | Jun 10, 2019 | Issued |
Array
(
[id] => 16080905
[patent_doc_number] => 20200194439
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-06-18
[patent_title] => SEMICONDUCTOR DEVICE INCLUDING SPACER AND METHOD OF MANUFACTURING THE SAME
[patent_app_type] => utility
[patent_app_number] => 16/437620
[patent_app_country] => US
[patent_app_date] => 2019-06-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8170
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -13
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16437620
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/437620 | Semiconductor device including spacer and method of manufacturing the same | Jun 10, 2019 | Issued |
Array
(
[id] => 16372526
[patent_doc_number] => 10804292
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-10-13
[patent_title] => Vertical memory devices and methods of manufacturing the same
[patent_app_type] => utility
[patent_app_number] => 16/437208
[patent_app_country] => US
[patent_app_date] => 2019-06-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 38
[patent_figures_cnt] => 38
[patent_no_of_words] => 10679
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 168
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16437208
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/437208 | Vertical memory devices and methods of manufacturing the same | Jun 10, 2019 | Issued |
Array
(
[id] => 15274775
[patent_doc_number] => 20190386122
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-12-19
[patent_title] => SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 16/436674
[patent_app_country] => US
[patent_app_date] => 2019-06-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 14188
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -13
[patent_words_short_claim] => 91
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16436674
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/436674 | Semiconductor device | Jun 9, 2019 | Issued |
Array
(
[id] => 15260075
[patent_doc_number] => 20190378771
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-12-12
[patent_title] => Component Carrier With a Stepped Cavity and a Stepped Component Assembly Embedded Within the Stepped Cavity
[patent_app_type] => utility
[patent_app_number] => 16/436111
[patent_app_country] => US
[patent_app_date] => 2019-06-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 11226
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -14
[patent_words_short_claim] => 71
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16436111
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/436111 | Component carrier with a stepped cavity and a stepped component assembly embedded within the stepped cavity | Jun 9, 2019 | Issued |
Array
(
[id] => 17048022
[patent_doc_number] => 11101212
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-08-24
[patent_title] => Thin film resistor with punch-through vias
[patent_app_type] => utility
[patent_app_number] => 16/423723
[patent_app_country] => US
[patent_app_date] => 2019-05-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 12
[patent_no_of_words] => 9029
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 75
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16423723
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/423723 | Thin film resistor with punch-through vias | May 27, 2019 | Issued |
Array
(
[id] => 16322616
[patent_doc_number] => 10782575
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-09-22
[patent_title] => Array substrate and display panel, and fabrication methods thereof
[patent_app_type] => utility
[patent_app_number] => 16/414515
[patent_app_country] => US
[patent_app_date] => 2019-05-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 12
[patent_no_of_words] => 7426
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 166
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16414515
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/414515 | Array substrate and display panel, and fabrication methods thereof | May 15, 2019 | Issued |
Array
(
[id] => 16233876
[patent_doc_number] => 10741439
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-08-11
[patent_title] => Merge mandrel features
[patent_app_type] => utility
[patent_app_number] => 16/411775
[patent_app_country] => US
[patent_app_date] => 2019-05-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 6
[patent_no_of_words] => 2482
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 95
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16411775
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/411775 | Merge mandrel features | May 13, 2019 | Issued |
Array
(
[id] => 16479657
[patent_doc_number] => 10854613
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-12-01
[patent_title] => Buried word line of a dynamic random access memory and method for fabricating the same
[patent_app_type] => utility
[patent_app_number] => 16/406017
[patent_app_country] => US
[patent_app_date] => 2019-05-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 12
[patent_no_of_words] => 3837
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 84
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16406017
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/406017 | Buried word line of a dynamic random access memory and method for fabricating the same | May 7, 2019 | Issued |
Array
(
[id] => 16704325
[patent_doc_number] => 10954245
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-03-23
[patent_title] => Thermal active delay fluorescent material, method for manufacturing same, and organic light-emitting diode device
[patent_app_type] => utility
[patent_app_number] => 16/489454
[patent_app_country] => US
[patent_app_date] => 2019-05-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 3
[patent_no_of_words] => 2810
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 28
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16489454
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/489454 | Thermal active delay fluorescent material, method for manufacturing same, and organic light-emitting diode device | May 5, 2019 | Issued |
Array
(
[id] => 16781898
[patent_doc_number] => 20210118977
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-04-22
[patent_title] => INTEGRATED CIRCUIT DEVICE AND METHOD OF MANUFACTURING THEREOF
[patent_app_type] => utility
[patent_app_number] => 17/051916
[patent_app_country] => US
[patent_app_date] => 2019-05-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3454
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -9
[patent_words_short_claim] => 152
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17051916
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/051916 | Integrated circuit device and method of manufacturing thereof | May 1, 2019 | Issued |
Array
(
[id] => 14752939
[patent_doc_number] => 20190259643
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-08-22
[patent_title] => FORMATION OF ELASTOMERIC LAYER ON SELECTIVE REGIONS OF LIGHT EMITTING DEVICE
[patent_app_type] => utility
[patent_app_number] => 16/402132
[patent_app_country] => US
[patent_app_date] => 2019-05-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5190
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -16
[patent_words_short_claim] => 70
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16402132
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/402132 | Formation of elastomeric layer on selective regions of light emitting device | May 1, 2019 | Issued |
Array
(
[id] => 15139339
[patent_doc_number] => 10483155
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2019-11-19
[patent_title] => Trench isolation interfaces
[patent_app_type] => utility
[patent_app_number] => 16/396288
[patent_app_country] => US
[patent_app_date] => 2019-04-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 4
[patent_no_of_words] => 8153
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 58
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16396288
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/396288 | Trench isolation interfaces | Apr 25, 2019 | Issued |