
Paul B. Prebilic
Examiner (ID: 10323, Phone: (571)272-4758 , Office: P/3774 )
| Most Active Art Unit | 3774 |
| Art Unit(s) | 3302, 1801, 3774, 3738, 2899, 3308 |
| Total Applications | 2387 |
| Issued Applications | 1530 |
| Pending Applications | 179 |
| Abandoned Applications | 684 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 1391683
[patent_doc_number] => 06552419
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2003-04-22
[patent_title] => 'Semiconductor device and liquid crystal module using the same'
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Array
(
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[patent_issue_date] => 2004-03-16
[patent_title] => 'Semiconductor package with crack-preventing member'
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Array
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Array
(
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Array
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Array
(
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Array
(
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Array
(
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Array
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Array
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Array
(
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Array
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Array
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Array
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Array
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Array
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