Search

Paul B. Yanchus Iii

Examiner (ID: 7899, Phone: (571)272-3678 , Office: P/2116 )

Most Active Art Unit
2116
Art Unit(s)
2115, 2127, 2119, 2185, 2116
Total Applications
1110
Issued Applications
881
Pending Applications
78
Abandoned Applications
167

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 9257808 [patent_doc_number] => 08621249 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-12-31 [patent_title] => 'Facilitating communication and power transfer between electrically-isolated powered device subsystems' [patent_app_type] => utility [patent_app_number] => 13/367008 [patent_app_country] => US [patent_app_date] => 2012-02-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 7418 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13367008 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/367008
Facilitating communication and power transfer between electrically-isolated powered device subsystems Feb 5, 2012 Issued
Array ( [id] => 8893755 [patent_doc_number] => 20130166939 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-06-27 [patent_title] => 'APPARATUS, SYSTEM, AND METHOD FOR PROVIDING CLOCK SIGNAL ON DEMAND' [patent_app_type] => utility [patent_app_number] => 13/334672 [patent_app_country] => US [patent_app_date] => 2011-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6448 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13334672 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/334672
Apparatus, system, and method for providing clock signal on demand Dec 21, 2011 Issued
Array ( [id] => 8432764 [patent_doc_number] => 20120254639 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-10-04 [patent_title] => 'COMMUNICATION APPARATUS, POWER CONTROL METHOD THEREOF, AND COMPUTER READABLE MEDIUM' [patent_app_type] => utility [patent_app_number] => 13/333820 [patent_app_country] => US [patent_app_date] => 2011-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4844 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13333820 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/333820
COMMUNICATION APPARATUS, POWER CONTROL METHOD THEREOF, AND COMPUTER READABLE MEDIUM Dec 20, 2011 Abandoned
Array ( [id] => 8314947 [patent_doc_number] => 20120191963 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-07-26 [patent_title] => 'BIOS Updating System, BIOS Updating Method, and Related Computer Program Product' [patent_app_type] => utility [patent_app_number] => 13/243409 [patent_app_country] => US [patent_app_date] => 2011-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3355 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13243409 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/243409
BIOS Updating System, BIOS Updating Method, and Related Computer Program Product Sep 22, 2011 Abandoned
Array ( [id] => 8189279 [patent_doc_number] => 20120117410 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-05-10 [patent_title] => 'POWER ON RESET CIRCUIT' [patent_app_type] => utility [patent_app_number] => 13/239066 [patent_app_country] => US [patent_app_date] => 2011-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5458 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0117/20120117410.pdf [firstpage_image] =>[orig_patent_app_number] => 13239066 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/239066
Power on reset circuit Sep 20, 2011 Issued
Array ( [id] => 10543267 [patent_doc_number] => 09268395 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-02-23 [patent_title] => 'Hierarchical power management circuit, power management method using the same, and system on chip including the hierarchical power management circuit' [patent_app_type] => utility [patent_app_number] => 13/233841 [patent_app_country] => US [patent_app_date] => 2011-09-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5670 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13233841 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/233841
Hierarchical power management circuit, power management method using the same, and system on chip including the hierarchical power management circuit Sep 14, 2011 Issued
Array ( [id] => 10046483 [patent_doc_number] => 09086880 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-07-21 [patent_title] => 'Communication device management apparatus, user device, and service device' [patent_app_type] => utility [patent_app_number] => 13/231012 [patent_app_country] => US [patent_app_date] => 2011-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 13635 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 178 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13231012 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/231012
Communication device management apparatus, user device, and service device Sep 12, 2011 Issued
Array ( [id] => 10183713 [patent_doc_number] => 09213392 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-12-15 [patent_title] => 'Systems and methods for governing power usage in an iterative decoding system' [patent_app_type] => utility [patent_app_number] => 13/227557 [patent_app_country] => US [patent_app_date] => 2011-09-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 9028 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13227557 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/227557
Systems and methods for governing power usage in an iterative decoding system Sep 7, 2011 Issued
Array ( [id] => 8699056 [patent_doc_number] => 20130061065 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-03-07 [patent_title] => 'SYSTEM AND METHOD FOR AN INTERLEAVED MULTI-STAGE PHASE ARRAY VOLTAGE REGULATOR' [patent_app_type] => utility [patent_app_number] => 13/226136 [patent_app_country] => US [patent_app_date] => 2011-09-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2767 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13226136 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/226136
System and method for an interleaved multi-stage phase array voltage regulator Sep 5, 2011 Issued
Array ( [id] => 8699067 [patent_doc_number] => 20130061076 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-03-07 [patent_title] => 'POWER CONSERVATION IN A DISTRIBUTED DIGITAL VIDEO RECORDER/CONTENT DELIVERY NETWORK SYSTEM' [patent_app_type] => utility [patent_app_number] => 13/226326 [patent_app_country] => US [patent_app_date] => 2011-09-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 7906 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13226326 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/226326
Power conservation in a distributed digital video recorder/content delivery network system Sep 5, 2011 Issued
Array ( [id] => 8686721 [patent_doc_number] => 20130055004 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-02-28 [patent_title] => 'HARDWARE-BASED AUTOMATIC CLOCK GATING' [patent_app_type] => utility [patent_app_number] => 13/223282 [patent_app_country] => US [patent_app_date] => 2011-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 8683 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13223282 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/223282
Hardware-based automatic clock gating Aug 30, 2011 Issued
Array ( [id] => 8686666 [patent_doc_number] => 20130054950 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-02-28 [patent_title] => 'USER-CONTROLLABLE BOOT ORDER THROUGH A HYPERVISOR' [patent_app_type] => utility [patent_app_number] => 13/223218 [patent_app_country] => US [patent_app_date] => 2011-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4160 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13223218 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/223218
User-controllable boot order through a hypervisor Aug 30, 2011 Issued
Array ( [id] => 9578816 [patent_doc_number] => 08769252 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-07-01 [patent_title] => 'Computer system and method for resetting the same' [patent_app_type] => utility [patent_app_number] => 13/221933 [patent_app_country] => US [patent_app_date] => 2011-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 4165 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13221933 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/221933
Computer system and method for resetting the same Aug 30, 2011 Issued
Array ( [id] => 9820931 [patent_doc_number] => 08930734 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2015-01-06 [patent_title] => 'Managing power states of a computing device' [patent_app_type] => utility [patent_app_number] => 13/221359 [patent_app_country] => US [patent_app_date] => 2011-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 8330 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 177 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13221359 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/221359
Managing power states of a computing device Aug 29, 2011 Issued
Array ( [id] => 7809087 [patent_doc_number] => 20120060041 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-03-08 [patent_title] => 'SYSTEM FOR CONTROLLING TOTAL POWER CONSUMPTION OF PLURAL APPARATUSES AND CONTROL METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 13/218999 [patent_app_country] => US [patent_app_date] => 2011-08-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 14064 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0060/20120060041.pdf [firstpage_image] =>[orig_patent_app_number] => 13218999 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/218999
System for controlling total power consumption of plural apparatuses and control method thereof Aug 25, 2011 Issued
Array ( [id] => 8201779 [patent_doc_number] => 20120124358 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-05-17 [patent_title] => 'CONFIGURATION INFORMATION RECOVERING SYSTEM AND METHOD' [patent_app_type] => utility [patent_app_number] => 13/217249 [patent_app_country] => US [patent_app_date] => 2011-08-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1261 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0124/20120124358.pdf [firstpage_image] =>[orig_patent_app_number] => 13217249 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/217249
CONFIGURATION INFORMATION RECOVERING SYSTEM AND METHOD Aug 24, 2011 Abandoned
Array ( [id] => 8349185 [patent_doc_number] => 20120210114 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-08-16 [patent_title] => 'LOG FILE PROCESSING SYSTEM AND METHOD' [patent_app_type] => utility [patent_app_number] => 13/217279 [patent_app_country] => US [patent_app_date] => 2011-08-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1730 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13217279 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/217279
LOG FILE PROCESSING SYSTEM AND METHOD Aug 24, 2011 Abandoned
Array ( [id] => 10059077 [patent_doc_number] => 09098438 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-08-04 [patent_title] => 'Synchronized voltage scaling and device calibration' [patent_app_type] => utility [patent_app_number] => 13/218116 [patent_app_country] => US [patent_app_date] => 2011-08-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 5660 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13218116 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/218116
Synchronized voltage scaling and device calibration Aug 24, 2011 Issued
Array ( [id] => 8493812 [patent_doc_number] => 20120293220 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-11-22 [patent_title] => 'Reset Control Device, Reset Control Method and Electronic Device' [patent_app_type] => utility [patent_app_number] => 13/214248 [patent_app_country] => US [patent_app_date] => 2011-08-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1744 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13214248 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/214248
Reset control device, reset control method and electronic device Aug 21, 2011 Issued
Array ( [id] => 8686660 [patent_doc_number] => 20130054944 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-02-28 [patent_title] => 'Information Handling System Swappable Boot Storage Device' [patent_app_type] => utility [patent_app_number] => 13/215051 [patent_app_country] => US [patent_app_date] => 2011-08-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3624 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13215051 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/215051
Information handling system swappable boot storage device Aug 21, 2011 Issued
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