
Paul Dinh
Examiner (ID: 2326, Phone: (571)272-1890 , Office: P/2851 )
| Most Active Art Unit | 2851 |
| Art Unit(s) | 2825, 2816, 2851 |
| Total Applications | 1996 |
| Issued Applications | 1754 |
| Pending Applications | 98 |
| Abandoned Applications | 176 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 19284222
[patent_doc_number] => 20240220698
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-07-04
[patent_title] => DATABASE DRIVEN PLACE AND ROUTE FOR COARSE-GRAIN RECONFIGURABLE ARCHITECTURES
[patent_app_type] => utility
[patent_app_number] => 18/092437
[patent_app_country] => US
[patent_app_date] => 2023-01-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 22988
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 107
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18092437
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/092437 | DATABASE DRIVEN PLACE AND ROUTE FOR COARSE-GRAIN RECONFIGURABLE ARCHITECTURES | Jan 1, 2023 | Pending |
Array
(
[id] => 19284220
[patent_doc_number] => 20240220696
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-07-04
[patent_title] => CELL-BASED SIGNAL CONNECTIVITY BETWEEN WAFER FRONTSIDE AND BACKSIDE
[patent_app_type] => utility
[patent_app_number] => 18/092126
[patent_app_country] => US
[patent_app_date] => 2022-12-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6634
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -21
[patent_words_short_claim] => 57
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18092126
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/092126 | CELL-BASED SIGNAL CONNECTIVITY BETWEEN WAFER FRONTSIDE AND BACKSIDE | Dec 29, 2022 | Pending |
Array
(
[id] => 19514665
[patent_doc_number] => 20240346351
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-10-17
[patent_title] => QUANTUM DEVICE AND MICROWAVE DEVICE
[patent_app_type] => utility
[patent_app_number] => 18/088807
[patent_app_country] => US
[patent_app_date] => 2022-12-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8883
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -31
[patent_words_short_claim] => 34
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18088807
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/088807 | QUANTUM DEVICE AND MICROWAVE DEVICE | Dec 26, 2022 | Pending |
Array
(
[id] => 18319658
[patent_doc_number] => 20230117786
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-04-20
[patent_title] => GENERATING INTEGRATED CIRCUIT PLACEMENTS USING NEURAL NETWORKS
[patent_app_type] => utility
[patent_app_number] => 18/082392
[patent_app_country] => US
[patent_app_date] => 2022-12-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 10106
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => 0
[patent_words_short_claim] => 250
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18082392
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/082392 | Generating integrated circuit placements using neural networks | Dec 14, 2022 | Issued |
Array
(
[id] => 19251430
[patent_doc_number] => 20240202421
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-06-20
[patent_title] => BI-DIRECTIONAL DYNAMIC FUNCTION EXCHANGE
[patent_app_type] => utility
[patent_app_number] => 18/066852
[patent_app_country] => US
[patent_app_date] => 2022-12-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 11715
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 63
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18066852
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/066852 | BI-DIRECTIONAL DYNAMIC FUNCTION EXCHANGE | Dec 14, 2022 | Pending |
Array
(
[id] => 19236143
[patent_doc_number] => 20240193338
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-06-13
[patent_title] => FREE-FORM LAYOUT FEATURE RETARGETING
[patent_app_type] => utility
[patent_app_number] => 18/064535
[patent_app_country] => US
[patent_app_date] => 2022-12-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7846
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 96
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18064535
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/064535 | FREE-FORM LAYOUT FEATURE RETARGETING | Dec 11, 2022 | Pending |
Array
(
[id] => 19236143
[patent_doc_number] => 20240193338
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-06-13
[patent_title] => FREE-FORM LAYOUT FEATURE RETARGETING
[patent_app_type] => utility
[patent_app_number] => 18/064535
[patent_app_country] => US
[patent_app_date] => 2022-12-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7846
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 96
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18064535
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/064535 | FREE-FORM LAYOUT FEATURE RETARGETING | Dec 11, 2022 | Pending |
Array
(
[id] => 19085136
[patent_doc_number] => 20240111937
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-04-04
[patent_title] => MACHINE LEARNING TOOL FOR LAYOUT DESIGN OF PRINTED CIRCUIT BOARD
[patent_app_type] => utility
[patent_app_number] => 18/059138
[patent_app_country] => US
[patent_app_date] => 2022-11-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9367
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 70
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18059138
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/059138 | MACHINE LEARNING TOOL FOR LAYOUT DESIGN OF PRINTED CIRCUIT BOARD | Nov 27, 2022 | Pending |
Array
(
[id] => 19085136
[patent_doc_number] => 20240111937
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-04-04
[patent_title] => MACHINE LEARNING TOOL FOR LAYOUT DESIGN OF PRINTED CIRCUIT BOARD
[patent_app_type] => utility
[patent_app_number] => 18/059138
[patent_app_country] => US
[patent_app_date] => 2022-11-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9367
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 70
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18059138
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/059138 | MACHINE LEARNING TOOL FOR LAYOUT DESIGN OF PRINTED CIRCUIT BOARD | Nov 27, 2022 | Pending |
Array
(
[id] => 18407902
[patent_doc_number] => 20230169255
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-06-01
[patent_title] => Methods And Systems For Data Driven Parameterization And Measurement Of Semiconductor Structures
[patent_app_type] => utility
[patent_app_number] => 17/993565
[patent_app_country] => US
[patent_app_date] => 2022-11-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 14923
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 119
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17993565
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/993565 | Methods And Systems For Data Driven Parameterization And Measurement Of Semiconductor Structures | Nov 22, 2022 | Pending |
Array
(
[id] => 18407892
[patent_doc_number] => 20230169245
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-06-01
[patent_title] => LEVERAGING CONCURRENCY TO IMPROVE INTERACTIVITY WITH AN EDA TOOL
[patent_app_type] => utility
[patent_app_number] => 17/992874
[patent_app_country] => US
[patent_app_date] => 2022-11-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 23497
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 82
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17992874
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/992874 | LEVERAGING CONCURRENCY TO IMPROVE INTERACTIVITY WITH AN EDA TOOL | Nov 21, 2022 | Pending |
Array
(
[id] => 18407892
[patent_doc_number] => 20230169245
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-06-01
[patent_title] => LEVERAGING CONCURRENCY TO IMPROVE INTERACTIVITY WITH AN EDA TOOL
[patent_app_type] => utility
[patent_app_number] => 17/992874
[patent_app_country] => US
[patent_app_date] => 2022-11-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 23497
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 82
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17992874
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/992874 | LEVERAGING CONCURRENCY TO IMPROVE INTERACTIVITY WITH AN EDA TOOL | Nov 21, 2022 | Pending |
Array
(
[id] => 18513605
[patent_doc_number] => 20230229840
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-07-20
[patent_title] => COMPUTING AND DISPLAYING A PREDICTED OVERLAP SHAPE IN AN IC DESIGN BASED ON PREDICTED MANUFACTURING CONTOURS
[patent_app_type] => utility
[patent_app_number] => 17/992897
[patent_app_country] => US
[patent_app_date] => 2022-11-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 12468
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 25
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17992897
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/992897 | COMPUTING AND DISPLAYING A PREDICTED OVERLAP SHAPE IN AN IC DESIGN BASED ON PREDICTED MANUFACTURING CONTOURS | Nov 21, 2022 | Pending |
Array
(
[id] => 18440138
[patent_doc_number] => 20230187433
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-06-15
[patent_title] => SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 18/055649
[patent_app_country] => US
[patent_app_date] => 2022-11-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 11042
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -9
[patent_words_short_claim] => 202
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18055649
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/055649 | Semiconductor device | Nov 14, 2022 | Issued |
Array
(
[id] => 18440138
[patent_doc_number] => 20230187433
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-06-15
[patent_title] => SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 18/055649
[patent_app_country] => US
[patent_app_date] => 2022-11-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 11042
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -9
[patent_words_short_claim] => 202
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18055649
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/055649 | Semiconductor device | Nov 14, 2022 | Issued |
Array
(
[id] => 19174851
[patent_doc_number] => 20240160825
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-05-16
[patent_title] => METHOD AND SYSTEM FOR PROVIDING FAULT TOLERANT LAYOUT OF MASSIVELY PARALLEL PROCESSING ARRAY
[patent_app_type] => utility
[patent_app_number] => 18/054460
[patent_app_country] => US
[patent_app_date] => 2022-11-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7906
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -13
[patent_words_short_claim] => 90
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18054460
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/054460 | METHOD AND SYSTEM FOR PROVIDING FAULT TOLERANT LAYOUT OF MASSIVELY PARALLEL PROCESSING ARRAY | Nov 9, 2022 | Pending |
Array
(
[id] => 18350553
[patent_doc_number] => 20230138664
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-05-04
[patent_title] => ENERGY SYSTEM FOR AN ELECTRIC VEHICLE
[patent_app_type] => utility
[patent_app_number] => 17/975393
[patent_app_country] => US
[patent_app_date] => 2022-10-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 2441
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -8
[patent_words_short_claim] => 144
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17975393
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/975393 | Energy system for an electric vehicle | Oct 26, 2022 | Issued |
Array
(
[id] => 18393860
[patent_doc_number] => 20230162080
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-05-25
[patent_title] => QUANTUM DEVICE
[patent_app_type] => utility
[patent_app_number] => 17/974744
[patent_app_country] => US
[patent_app_date] => 2022-10-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 10489
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -15
[patent_words_short_claim] => 117
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17974744
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/974744 | QUANTUM DEVICE | Oct 26, 2022 | Pending |
Array
(
[id] => 18393860
[patent_doc_number] => 20230162080
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-05-25
[patent_title] => QUANTUM DEVICE
[patent_app_type] => utility
[patent_app_number] => 17/974744
[patent_app_country] => US
[patent_app_date] => 2022-10-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 10489
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -15
[patent_words_short_claim] => 117
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17974744
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/974744 | QUANTUM DEVICE | Oct 26, 2022 | Pending |
Array
(
[id] => 19128916
[patent_doc_number] => 20240134269
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-04-25
[patent_title] => ENHANCED MASK PATTERN-AWARE HEURISTICS FOR OPTICAL PROXIMITY CORRECTIONS FOR INTEGRATED CIRCUITS
[patent_app_type] => utility
[patent_app_number] => 17/973514
[patent_app_country] => US
[patent_app_date] => 2022-10-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8862
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 165
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17973514
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/973514 | ENHANCED MASK PATTERN-AWARE HEURISTICS FOR OPTICAL PROXIMITY CORRECTIONS FOR INTEGRATED CIRCUITS | Oct 24, 2022 | Pending |