Paul Dinh

Array ( [id] => 1597826 [patent_doc_number] => 06384642 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-05-07 [patent_title] => 'Switched positive feedback for controlled receiver impedance' [patent_app_type] => B1 [patent_app_number] => 09/680572 [patent_app_country] => US [patent_app_date] => 2000-10-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 1743 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/384/06384642.pdf [firstpage_image] =>[orig_patent_app_number] => 09680572 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1597912 [patent_doc_number] => 06384664 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-05-07 [patent_title] => 'Differential voltage sense circuit to detect the state of a CMOS process compatible fuses at low power supply voltages' [patent_app_type] => B1 [patent_app_number] => 09/680811 [patent_app_country] => US [patent_app_date] => 2000-10-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 13 [patent_no_of_words] => 3891 [patent_no_of_claims] => 71 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/384/06384664.pdf [firstpage_image] =>[orig_patent_app_number] => 09680811 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1591821 [patent_doc_number] => 06483371 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-11-19 [patent_title] => 'Universal temperature compensation application specific integrated circuit' [patent_app_type] => B1 [patent_app_number] => 09/676824 [patent_app_country] => US [patent_app_date] => 2000-10-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 2989 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/483/06483371.pdf [firstpage_image] =>[orig_patent_app_number] => 09676824 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1462226 [patent_doc_number] => 06392470 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-05-21 [patent_title] => 'Bandgap reference voltage startup circuit' [patent_app_type] => B1 [patent_app_number] => 09/670589 [patent_app_country] => US [patent_app_date] => 2000-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 2118 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/392/06392470.pdf [firstpage_image] =>[orig_patent_app_number] => 09670589 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4312197 [patent_doc_number] => 06326816 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-12-04 [patent_title] => 'Method and apparatus for minimal phase delay and zero-crossing filtering' [patent_app_type] => 1 [patent_app_number] => 9/669880 [patent_app_country] => US [patent_app_date] => 2000-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 3323 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/326/06326816.pdf [firstpage_image] =>[orig_patent_app_number] => 669880 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4368755 [patent_doc_number] => 06255873 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-07-03 [patent_title] => 'Setting the common mode level of a differential charge pump output' [patent_app_type] => 1 [patent_app_number] => 9/665339 [patent_app_country] => US [patent_app_date] => 2000-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3345 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/255/06255873.pdf [firstpage_image] =>[orig_patent_app_number] => 665339 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1476925 [patent_doc_number] => 06388504 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-05-14 [patent_title] => 'Integrated circuit device with switching between active mode and standby mode controlled by digital circuit' [patent_app_type] => B1 [patent_app_number] => 09/663356 [patent_app_country] => US [patent_app_date] => 2000-09-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 42 [patent_no_of_words] => 12031 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/388/06388504.pdf [firstpage_image] =>[orig_patent_app_number] => 09663356 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4336806 [patent_doc_number] => 06320448 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-11-20 [patent_title] => 'Bridge circuit for switching high currents' [patent_app_type] => 1 [patent_app_number] => 9/658715 [patent_app_country] => US [patent_app_date] => 2000-09-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 3 [patent_no_of_words] => 2113 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/320/06320448.pdf [firstpage_image] =>[orig_patent_app_number] => 658715 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1519534 [patent_doc_number] => 06501303 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-12-31 [patent_title] => 'Semiconductor integrated circuit' [patent_app_type] => B1 [patent_app_number] => 09/659573 [patent_app_country] => US [patent_app_date] => 2000-09-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 4703 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 180 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/501/06501303.pdf [firstpage_image] =>[orig_patent_app_number] => 09659573 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4277916 [patent_doc_number] => 06307424 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-10-23 [patent_title] => 'Programmable impedance control output circuit and programmable impedance control method thereof in semiconductor device' [patent_app_type] => 1 [patent_app_number] => 9/656975 [patent_app_country] => US [patent_app_date] => 2000-09-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 19 [patent_no_of_words] => 8572 [patent_no_of_claims] => 43 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/307/06307424.pdf [firstpage_image] =>[orig_patent_app_number] => 656975 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4412261 [patent_doc_number] => 06271700 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-08-07 [patent_title] => 'Semiconductor integrated circuit having scan path' [patent_app_type] => 1 [patent_app_number] => 9/656421 [patent_app_country] => US [patent_app_date] => 2000-09-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 4395 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/271/06271700.pdf [firstpage_image] =>[orig_patent_app_number] => 656421 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4375801 [patent_doc_number] => 06275083 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-08-14 [patent_title] => 'Low operational power, low leakage power D-type flip-flop' [patent_app_type] => 1 [patent_app_number] => 9/655206 [patent_app_country] => US [patent_app_date] => 2000-09-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 20 [patent_no_of_words] => 7185 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/275/06275083.pdf [firstpage_image] =>[orig_patent_app_number] => 655206 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1588549 [patent_doc_number] => 06359475 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-03-19 [patent_title] => 'High-speed, low-power sample and hold circuit' [patent_app_type] => B1 [patent_app_number] => 09/650561 [patent_app_country] => US [patent_app_date] => 2000-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2334 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 250 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/359/06359475.pdf [firstpage_image] =>[orig_patent_app_number] => 09650561 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1603420 [patent_doc_number] => 06433602 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-08-13 [patent_title] => 'High speed Schmitt Trigger with low supply voltage' [patent_app_type] => B1 [patent_app_number] => 09/651689 [patent_app_country] => US [patent_app_date] => 2000-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 3085 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/433/06433602.pdf [firstpage_image] =>[orig_patent_app_number] => 09651689 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1472210 [patent_doc_number] => 06407588 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-06-18 [patent_title] => 'High speed low power input buffer' [patent_app_type] => B1 [patent_app_number] => 09/649555 [patent_app_country] => US [patent_app_date] => 2000-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 12 [patent_no_of_words] => 4672 [patent_no_of_claims] => 76 [patent_no_of_ind_claims] => 19 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/407/06407588.pdf [firstpage_image] =>[orig_patent_app_number] => 09649555 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1325937 [patent_doc_number] => 06615396 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-09-02 [patent_title] => 'Searching for a path through a circuit' [patent_app_type] => B1 [patent_app_number] => 09/648090 [patent_app_country] => US [patent_app_date] => 2000-08-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2146 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/615/06615396.pdf [firstpage_image] =>[orig_patent_app_number] => 09648090 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1436994 [patent_doc_number] => 06356130 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-03-12 [patent_title] => 'Circuit for enabling servo system to perform an automatic system recovery and the method therefor' [patent_app_type] => B1 [patent_app_number] => 09/644832 [patent_app_country] => US [patent_app_date] => 2000-08-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1594 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/356/06356130.pdf [firstpage_image] =>[orig_patent_app_number] => 09644832 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1430130 [patent_doc_number] => 06510540 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-01-21 [patent_title] => 'Windowing mechanism for reducing pessimism in cross-talk analysis of digital chips' [patent_app_type] => B1 [patent_app_number] => 09/640540 [patent_app_country] => US [patent_app_date] => 2000-08-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 4246 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/510/06510540.pdf [firstpage_image] =>[orig_patent_app_number] => 09640540 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4339286 [patent_doc_number] => 06313674 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-11-06 [patent_title] => 'Synchronizing circuit for generating internal signal synchronized to external signal' [patent_app_type] => 1 [patent_app_number] => 9/641139 [patent_app_country] => US [patent_app_date] => 2000-08-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 18 [patent_no_of_words] => 9215 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 180 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/313/06313674.pdf [firstpage_image] =>[orig_patent_app_number] => 641139 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1387600 [patent_doc_number] => 06559694 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-05-06 [patent_title] => 'Timing signal occurrence circuit' [patent_app_type] => B1 [patent_app_number] => 09/636511 [patent_app_country] => US [patent_app_date] => 2000-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 12 [patent_no_of_words] => 3332 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 233 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/559/06559694.pdf [firstpage_image] =>[orig_patent_app_number] => 09636511 [rel_patent_id] =>[rel_patent_doc_number] =>)