
Paul Dinh
Examiner (ID: 13722, Phone: (571)272-1890 , Office: P/2851 )
| Most Active Art Unit | 2851 |
| Art Unit(s) | 2851, 2816, 2825 |
| Total Applications | 2030 |
| Issued Applications | 1783 |
| Pending Applications | 89 |
| Abandoned Applications | 177 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 4416159
[patent_doc_number] => 06265928
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-07-24
[patent_title] => 'Precision-controlled logarithmic amplifier'
[patent_app_type] => 1
[patent_app_number] => 9/354984
[patent_app_country] => US
[patent_app_date] => 1999-07-16
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[pdf_file] => patents/06/265/06265928.pdf
[firstpage_image] =>[orig_patent_app_number] => 354984
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/354984 | Precision-controlled logarithmic amplifier | Jul 15, 1999 | Issued |
| 09/354461 | CAPACITOR-BASED EXPONENTIAL PROGRAMMABLE GAIN AMPLIFIER | Jul 14, 1999 | Abandoned |
Array
(
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[patent_issue_date] => 2001-05-15
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Array
(
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[patent_title] => 'Automatic defect source classification'
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Array
(
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[patent_kind] => NA
[patent_issue_date] => 2000-11-07
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Array
(
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[patent_title] => 'Sense amplifier for integrated circuits using PMOS transistors'
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Array
(
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Array
(
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Array
(
[id] => 4358075
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[patent_kind] => NA
[patent_issue_date] => 2001-04-10
[patent_title] => 'Deceleration circuit'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/351096 | Deceleration circuit | Jul 8, 1999 | Issued |
Array
(
[id] => 1309429
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Array
(
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Array
(
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Array
(
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Array
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Array
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Array
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Array
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Array
(
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Array
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Array
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