Search

Paul J. Hirsch

Examiner (ID: 2370)

Most Active Art Unit
3303
Art Unit(s)
3732, 3747, 1804, 3753, 3739, 3303, 3616, 3754, 2899, 3202
Total Applications
2050
Issued Applications
1812
Pending Applications
99
Abandoned Applications
139

Applications

Application numberTitle of the applicationFiling DateStatus
08/025533 WAFER-LIKE PROCESSING AFTER SAWING DMDS Mar 2, 1993 Abandoned
Array ( [id] => 3057000 [patent_doc_number] => 05310453 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-05-10 [patent_title] => 'Plasma process method using an electrostatic chuck' [patent_app_type] => 1 [patent_app_number] => 8/017379 [patent_app_country] => US [patent_app_date] => 1993-02-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 8255 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/310/05310453.pdf [firstpage_image] =>[orig_patent_app_number] => 017379 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/017379
Plasma process method using an electrostatic chuck Feb 11, 1993 Issued
Array ( [id] => 3006700 [patent_doc_number] => 05354710 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-10-11 [patent_title] => 'Method of manufacturing semiconductor devices using an adsorption enhancement layer' [patent_app_type] => 1 [patent_app_number] => 8/017449 [patent_app_country] => US [patent_app_date] => 1993-02-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 14 [patent_no_of_words] => 3751 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/354/05354710.pdf [firstpage_image] =>[orig_patent_app_number] => 017449 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/017449
Method of manufacturing semiconductor devices using an adsorption enhancement layer Feb 11, 1993 Issued
Array ( [id] => 3043675 [patent_doc_number] => 05334539 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-08-02 [patent_title] => 'Fabrication of poly(p-phenyleneacetylene) light-emitting diodes' [patent_app_type] => 1 [patent_app_number] => 8/011391 [patent_app_country] => US [patent_app_date] => 1993-01-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 7866 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/334/05334539.pdf [firstpage_image] =>[orig_patent_app_number] => 011391 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/011391
Fabrication of poly(p-phenyleneacetylene) light-emitting diodes Jan 28, 1993 Issued
07/997632 METHOD TO PRODUCE MASKING Dec 27, 1992 Abandoned
Array ( [id] => 3058772 [patent_doc_number] => 05352328 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-10-04 [patent_title] => 'Control of time-dependent haze in the manufacture of integrated circuits' [patent_app_type] => 1 [patent_app_number] => 7/991064 [patent_app_country] => US [patent_app_date] => 1992-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 1920 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/352/05352328.pdf [firstpage_image] =>[orig_patent_app_number] => 991064 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/991064
Control of time-dependent haze in the manufacture of integrated circuits Dec 14, 1992 Issued
Array ( [id] => 3112206 [patent_doc_number] => 05380398 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-01-10 [patent_title] => 'Method for selectively etching AlGaAs' [patent_app_type] => 1 [patent_app_number] => 7/982194 [patent_app_country] => US [patent_app_date] => 1992-11-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 1464 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/380/05380398.pdf [firstpage_image] =>[orig_patent_app_number] => 982194 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/982194
Method for selectively etching AlGaAs Nov 24, 1992 Issued
Array ( [id] => 3043979 [patent_doc_number] => 05334555 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-08-02 [patent_title] => 'Method of determining conditions for plasma silicon nitride film growth and method of manufacturing semiconductor device' [patent_app_type] => 1 [patent_app_number] => 7/972962 [patent_app_country] => US [patent_app_date] => 1992-11-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2699 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/334/05334555.pdf [firstpage_image] =>[orig_patent_app_number] => 972962 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/972962
Method of determining conditions for plasma silicon nitride film growth and method of manufacturing semiconductor device Nov 5, 1992 Issued
07/973199 UHF/VHF PLASMA FOR USE IN FORMING INTEGRATED CIRCUIT STRUCTURES ON SEMICONDUCTOR WAFERS Nov 5, 1992 Abandoned
Array ( [id] => 3475912 [patent_doc_number] => 05405489 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-04-11 [patent_title] => 'Method for fabricating an interlayer-dielectric film of a semiconductor device by using a plasma treatment prior to reflow' [patent_app_type] => 1 [patent_app_number] => 7/969582 [patent_app_country] => US [patent_app_date] => 1992-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 14 [patent_no_of_words] => 1909 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/405/05405489.pdf [firstpage_image] =>[orig_patent_app_number] => 969582 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/969582
Method for fabricating an interlayer-dielectric film of a semiconductor device by using a plasma treatment prior to reflow Oct 29, 1992 Issued
07/964362 METHOD FOR FILLING CONTACT HOLES WITH METAL BY TWO-STEP DEPOSITION Oct 20, 1992 Abandoned
Array ( [id] => 3471087 [patent_doc_number] => 05431772 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-07-11 [patent_title] => 'Selective silicon nitride plasma etching process' [patent_app_type] => 1 [patent_app_number] => 7/963890 [patent_app_country] => US [patent_app_date] => 1992-10-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 11 [patent_no_of_words] => 4327 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 276 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/431/05431772.pdf [firstpage_image] =>[orig_patent_app_number] => 963890 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/963890
Selective silicon nitride plasma etching process Oct 18, 1992 Issued
07/961760 METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE WHEREBY A LAYER OF MATERIAL IS DEPOSITED ON THE SURFACE OF A SEMICONDUCTOR WAFER FROM A PROCESS GAS Oct 15, 1992 Abandoned
07/958385 METHOD FOR DEPOSITION OF A CONDUCTOR IN INTEGRATED SEMICONDUCTOR CIRCUITS Oct 7, 1992 Abandoned
Array ( [id] => 3117602 [patent_doc_number] => 05380683 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-01-10 [patent_title] => 'Ionized cluster beam deposition of sapphire and silicon layers' [patent_app_type] => 1 [patent_app_number] => 7/955603 [patent_app_country] => US [patent_app_date] => 1992-10-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 4288 [patent_no_of_claims] => 48 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 285 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/380/05380683.pdf [firstpage_image] =>[orig_patent_app_number] => 955603 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/955603
Ionized cluster beam deposition of sapphire and silicon layers Oct 1, 1992 Issued
Array ( [id] => 2941164 [patent_doc_number] => 05223458 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-06-29 [patent_title] => 'Method of manufacturing a III-V semiconductor device using a self-biased substrate and a plasma containing an electronegative species' [patent_app_type] => 1 [patent_app_number] => 7/954607 [patent_app_country] => US [patent_app_date] => 1992-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 3954 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/223/05223458.pdf [firstpage_image] =>[orig_patent_app_number] => 954607 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/954607
Method of manufacturing a III-V semiconductor device using a self-biased substrate and a plasma containing an electronegative species Sep 29, 1992 Issued
Array ( [id] => 3008071 [patent_doc_number] => 05332468 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-07-26 [patent_title] => 'Method for structuring a layer using a ring electrode and multiple RF power sources' [patent_app_type] => 1 [patent_app_number] => 7/953937 [patent_app_country] => US [patent_app_date] => 1992-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 2400 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 177 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/332/05332468.pdf [firstpage_image] =>[orig_patent_app_number] => 953937 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/953937
Method for structuring a layer using a ring electrode and multiple RF power sources Sep 29, 1992 Issued
Array ( [id] => 2941870 [patent_doc_number] => 05261998 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-11-16 [patent_title] => 'Method for detecting an end point of etching in semiconductor manufacture using the emission spectrum of helium' [patent_app_type] => 1 [patent_app_number] => 7/950140 [patent_app_country] => US [patent_app_date] => 1992-09-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 1659 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/261/05261998.pdf [firstpage_image] =>[orig_patent_app_number] => 950140 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/950140
Method for detecting an end point of etching in semiconductor manufacture using the emission spectrum of helium Sep 23, 1992 Issued
Array ( [id] => 3053009 [patent_doc_number] => 05350491 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-09-27 [patent_title] => 'Oxide removal method for improvement of subsequently grown oxides for a twin-tub CMOS process' [patent_app_type] => 1 [patent_app_number] => 7/947313 [patent_app_country] => US [patent_app_date] => 1992-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 10 [patent_no_of_words] => 2709 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/350/05350491.pdf [firstpage_image] =>[orig_patent_app_number] => 947313 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/947313
Oxide removal method for improvement of subsequently grown oxides for a twin-tub CMOS process Sep 17, 1992 Issued
Array ( [id] => 3053027 [patent_doc_number] => 05350492 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-09-27 [patent_title] => 'Oxide removal method for improvement of subsequently grown oxides' [patent_app_type] => 1 [patent_app_number] => 7/947314 [patent_app_country] => US [patent_app_date] => 1992-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 10 [patent_no_of_words] => 2693 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/350/05350492.pdf [firstpage_image] =>[orig_patent_app_number] => 947314 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/947314
Oxide removal method for improvement of subsequently grown oxides Sep 17, 1992 Issued
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