Search

Paul J. Holland

Examiner (ID: 13306, Phone: (571)270-3537 , Office: P/1656 )

Most Active Art Unit
1656
Art Unit(s)
1656
Total Applications
946
Issued Applications
496
Pending Applications
113
Abandoned Applications
363

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 14753277 [patent_doc_number] => 20190259812 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-08-22 [patent_title] => CROSS-POINT ARRAY DEVICE AND METHOD OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 16/172504 [patent_app_country] => US [patent_app_date] => 2018-10-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9058 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16172504 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/172504
Cross-point array device and method of manufacturing the same Oct 25, 2018 Issued
Array ( [id] => 14238655 [patent_doc_number] => 20190131500 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-05-02 [patent_title] => LIGHT-EMITTING DEVICE [patent_app_type] => utility [patent_app_number] => 16/172406 [patent_app_country] => US [patent_app_date] => 2018-10-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 18351 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 48 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16172406 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/172406
Light-emitting device Oct 25, 2018 Issued
Array ( [id] => 15046063 [patent_doc_number] => 20190334036 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-10-31 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 16/172647 [patent_app_country] => US [patent_app_date] => 2018-10-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4399 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 196 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16172647 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/172647
Semiconductor device and method of manufacturing the same Oct 25, 2018 Issued
Array ( [id] => 15841521 [patent_doc_number] => 20200136043 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-30 [patent_title] => Structure and Method to Form Phase Change Memory Cell with Self-Align Top Electrode Contact [patent_app_type] => utility [patent_app_number] => 16/172643 [patent_app_country] => US [patent_app_date] => 2018-10-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2330 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 44 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16172643 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/172643
Structure and method to form phase change memory cell with self- align top electrode contact Oct 25, 2018 Issued
Array ( [id] => 16865864 [patent_doc_number] => 11024617 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-06-01 [patent_title] => Semiconductor packages having photon integrated circuit (PIC) chips [patent_app_type] => utility [patent_app_number] => 16/172624 [patent_app_country] => US [patent_app_date] => 2018-10-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 6427 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 381 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16172624 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/172624
Semiconductor packages having photon integrated circuit (PIC) chips Oct 25, 2018 Issued
Array ( [id] => 17456267 [patent_doc_number] => 11271134 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-03-08 [patent_title] => Method for manufacturing an optical sensor and optical sensor [patent_app_type] => utility [patent_app_number] => 16/756025 [patent_app_country] => US [patent_app_date] => 2018-10-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 37 [patent_no_of_words] => 9129 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 257 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16756025 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/756025
Method for manufacturing an optical sensor and optical sensor Oct 14, 2018 Issued
Array ( [id] => 16617450 [patent_doc_number] => 20210036103 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-02-04 [patent_title] => FABRICATION OF LATERAL SUPERJUNCTION DEVICES USING SELECTIVE EPITAXY [patent_app_type] => utility [patent_app_number] => 16/642283 [patent_app_country] => US [patent_app_date] => 2018-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7718 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16642283 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/642283
Fabrication of lateral superjunction devices using selective epitaxy Sep 27, 2018 Issued
Array ( [id] => 15688215 [patent_doc_number] => 20200098771 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-03-26 [patent_title] => THREE-DIMENSIONAL MEMORY DEVICE INCLUDING THREE-DIMENSIONAL BIT LINE DISCHARGE TRANSISTORS AND METHOD OF MAKING THE SAME [patent_app_type] => utility [patent_app_number] => 16/142644 [patent_app_country] => US [patent_app_date] => 2018-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17721 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16142644 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/142644
Three-dimensional memory device including three-dimensional bit line discharge transistors and method of making the same Sep 25, 2018 Issued
Array ( [id] => 15519343 [patent_doc_number] => 10566268 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-02-18 [patent_title] => Package to die connection system and method therefor [patent_app_type] => utility [patent_app_number] => 16/142623 [patent_app_country] => US [patent_app_date] => 2018-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 5005 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16142623 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/142623
Package to die connection system and method therefor Sep 25, 2018 Issued
Array ( [id] => 15688635 [patent_doc_number] => 20200098981 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-03-26 [patent_title] => METHODS TO FORM TOP CONTACT TO A MAGNETIC TUNNEL JUNCTION [patent_app_type] => utility [patent_app_number] => 16/141470 [patent_app_country] => US [patent_app_date] => 2018-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2496 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16141470 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/141470
Methods to form top contact to a magnetic tunnel junction Sep 24, 2018 Issued
Array ( [id] => 14191059 [patent_doc_number] => 20190115235 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-04-18 [patent_title] => METHOD OF MANUFACTURING SEMICONDUCTOR PACKAGE [patent_app_type] => utility [patent_app_number] => 16/140877 [patent_app_country] => US [patent_app_date] => 2018-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8276 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16140877 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/140877
Method of manufacturing semiconductor package Sep 24, 2018 Issued
Array ( [id] => 15688633 [patent_doc_number] => 20200098980 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-03-26 [patent_title] => METHOD FOR FORMING HIGH DENSITY STRUCTURES WITH IMPROVED RESIST ADHESION TO HARD MASK [patent_app_type] => utility [patent_app_number] => 16/140455 [patent_app_country] => US [patent_app_date] => 2018-09-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4606 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16140455 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/140455
METHOD FOR FORMING HIGH DENSITY STRUCTURES WITH IMPROVED RESIST ADHESION TO HARD MASK Sep 23, 2018 Abandoned
Array ( [id] => 17803272 [patent_doc_number] => 11417584 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-08-16 [patent_title] => Semiconductor device [patent_app_type] => utility [patent_app_number] => 16/647548 [patent_app_country] => US [patent_app_date] => 2018-09-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 29 [patent_figures_cnt] => 46 [patent_no_of_words] => 11523 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16647548 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/647548
Semiconductor device Sep 10, 2018 Issued
Array ( [id] => 13832929 [patent_doc_number] => 20190019949 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-01-17 [patent_title] => Memory Cells, Memory Arrays, and Methods of Forming Memory Cells and Arrays [patent_app_type] => utility [patent_app_number] => 16/121433 [patent_app_country] => US [patent_app_date] => 2018-09-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8499 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16121433 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/121433
Memory cells, memory arrays, and methods of forming memory cells and arrays Sep 3, 2018 Issued
Array ( [id] => 15322525 [patent_doc_number] => 20200001592 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-01-02 [patent_title] => LIGHT TRANSMISSION PROCESSING SYSTEM AND METHOD FOR SOLAR CHIP MODULE [patent_app_type] => utility [patent_app_number] => 16/118493 [patent_app_country] => US [patent_app_date] => 2018-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5857 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16118493 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/118493
LIGHT TRANSMISSION PROCESSING SYSTEM AND METHOD FOR SOLAR CHIP MODULE Aug 30, 2018 Abandoned
Array ( [id] => 15857905 [patent_doc_number] => 10644255 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-05-05 [patent_title] => Array substrate, display panel and method for fabricating array substrate [patent_app_type] => utility [patent_app_number] => 16/118637 [patent_app_country] => US [patent_app_date] => 2018-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 3510 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16118637 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/118637
Array substrate, display panel and method for fabricating array substrate Aug 30, 2018 Issued
Array ( [id] => 14350643 [patent_doc_number] => 20190157294 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-05-23 [patent_title] => VERTICAL MEMORY DEVICES AND METHODS OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 16/118647 [patent_app_country] => US [patent_app_date] => 2018-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8903 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16118647 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/118647
Vertical memory devices and methods of manufacturing the same Aug 30, 2018 Issued
Array ( [id] => 15673313 [patent_doc_number] => 10600900 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-03-24 [patent_title] => Semiconductor device and electric apparatus [patent_app_type] => utility [patent_app_number] => 16/118603 [patent_app_country] => US [patent_app_date] => 2018-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 16 [patent_no_of_words] => 10732 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16118603 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/118603
Semiconductor device and electric apparatus Aug 30, 2018 Issued
Array ( [id] => 15597569 [patent_doc_number] => 20200075319 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-03-05 [patent_title] => Morphology of Resist Mask Prior to Etching [patent_app_type] => utility [patent_app_number] => 16/118851 [patent_app_country] => US [patent_app_date] => 2018-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9499 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 40 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16118851 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/118851
Morphology of resist mask prior to etching Aug 30, 2018 Issued
Array ( [id] => 16132381 [patent_doc_number] => 10699958 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-06-30 [patent_title] => Semiconductor device with high-resistance gate [patent_app_type] => utility [patent_app_number] => 16/116730 [patent_app_country] => US [patent_app_date] => 2018-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 3693 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16116730 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/116730
Semiconductor device with high-resistance gate Aug 28, 2018 Issued
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