Paul J Killos
Examiner (ID: 14937)
Most Active Art Unit | 1206 |
Art Unit(s) | 1623, 1621, 1625, 1204, 1206 |
Total Applications | 2978 |
Issued Applications | 2595 |
Pending Applications | 134 |
Abandoned Applications | 247 |
Applications
Application number | Title of the application | Filing Date | Status |
---|---|---|---|
Array
(
[id] => 578558
[patent_doc_number] => 07459737
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-12-02
[patent_title] => 'Low current magnetic memory'
[patent_app_type] => utility
[patent_app_number] => 11/048119
[patent_app_country] => US
[patent_app_date] => 2005-02-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 19
[patent_no_of_words] => 10569
[patent_no_of_claims] => 10
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[patent_words_short_claim] => 137
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/459/07459737.pdf
[firstpage_image] =>[orig_patent_app_number] => 11048119
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/048119 | Low current magnetic memory | Jan 31, 2005 | Issued |
Array
(
[id] => 7002463
[patent_doc_number] => 20050167776
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-08-04
[patent_title] => 'Vertical-type power metal oxide semiconductor device with excess current protective function'
[patent_app_type] => utility
[patent_app_number] => 11/045568
[patent_app_country] => US
[patent_app_date] => 2005-01-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
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[patent_no_of_words] => 12985
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0167/20050167776.pdf
[firstpage_image] =>[orig_patent_app_number] => 11045568
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/045568 | Vertical-type power metal oxide semiconductor device with excess current protective function | Jan 30, 2005 | Abandoned |
Array
(
[id] => 14643
[patent_doc_number] => 07804135
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-09-28
[patent_title] => 'Integrated semiconductor diode arrangement and integrated semiconductor component'
[patent_app_type] => utility
[patent_app_number] => 11/042928
[patent_app_country] => US
[patent_app_date] => 2005-01-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
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[patent_no_of_words] => 4110
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[pdf_file] => patents/07/804/07804135.pdf
[firstpage_image] =>[orig_patent_app_number] => 11042928
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/042928 | Integrated semiconductor diode arrangement and integrated semiconductor component | Jan 24, 2005 | Issued |
Array
(
[id] => 641769
[patent_doc_number] => 07122468
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-10-17
[patent_title] => 'Methods of fabricating integrated circuit conductive contact structures including grooves'
[patent_app_type] => utility
[patent_app_number] => 11/039562
[patent_app_country] => US
[patent_app_date] => 2005-01-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 4585
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 200
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/122/07122468.pdf
[firstpage_image] =>[orig_patent_app_number] => 11039562
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/039562 | Methods of fabricating integrated circuit conductive contact structures including grooves | Jan 19, 2005 | Issued |
Array
(
[id] => 6988704
[patent_doc_number] => 20050087817
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-04-28
[patent_title] => 'Electrically Programmable Three-Dimensional Memory Structures and Cells'
[patent_app_type] => utility
[patent_app_number] => 10/905609
[patent_app_country] => US
[patent_app_date] => 2005-01-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 23
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[patent_no_of_words] => 25364
[patent_no_of_claims] => 20
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0087/20050087817.pdf
[firstpage_image] =>[orig_patent_app_number] => 10905609
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/905609 | Electrically Programmable Three-Dimensional Memory Structures and Cells | Jan 11, 2005 | Abandoned |
Array
(
[id] => 830482
[patent_doc_number] => 07400037
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-07-15
[patent_title] => 'Packaging structure with coplanar filling paste and dice and with patterned glue for WL-CSP'
[patent_app_type] => utility
[patent_app_number] => 11/026488
[patent_app_country] => US
[patent_app_date] => 2004-12-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 15
[patent_no_of_words] => 2664
[patent_no_of_claims] => 12
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/400/07400037.pdf
[firstpage_image] =>[orig_patent_app_number] => 11026488
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/026488 | Packaging structure with coplanar filling paste and dice and with patterned glue for WL-CSP | Dec 29, 2004 | Issued |
Array
(
[id] => 7048430
[patent_doc_number] => 20050184317
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-08-25
[patent_title] => 'Semiconductor device'
[patent_app_type] => utility
[patent_app_number] => 11/024419
[patent_app_country] => US
[patent_app_date] => 2004-12-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 4128
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
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[patent_maintenance] => 1
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0184/20050184317.pdf
[firstpage_image] =>[orig_patent_app_number] => 11024419
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/024419 | Semiconductor device | Dec 29, 2004 | Abandoned |
Array
(
[id] => 5720863
[patent_doc_number] => 20060073638
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-04-06
[patent_title] => 'Semiconductor electrical connection structure and method of fabricating the same'
[patent_app_type] => utility
[patent_app_number] => 11/022789
[patent_app_country] => US
[patent_app_date] => 2004-12-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 3334
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 2
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[patent_maintenance] => 1
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0073/20060073638.pdf
[firstpage_image] =>[orig_patent_app_number] => 11022789
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/022789 | Semiconductor electrical connection structure and method of fabricating the same | Dec 27, 2004 | Abandoned |
Array
(
[id] => 5736030
[patent_doc_number] => 20060006420
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-01-12
[patent_title] => 'Semiconductor device and a CMOS integrated circuit device'
[patent_app_type] => utility
[patent_app_number] => 11/020578
[patent_app_country] => US
[patent_app_date] => 2004-12-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 24
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[patent_no_of_words] => 8656
[patent_no_of_claims] => 20
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[pdf_file] => publications/A1/0006/20060006420.pdf
[firstpage_image] =>[orig_patent_app_number] => 11020578
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/020578 | Semiconductor device and a CMOS integrated circuit device | Dec 26, 2004 | Abandoned |
Array
(
[id] => 6909955
[patent_doc_number] => 20050173713
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-08-11
[patent_title] => 'Multi-pin light-emitting diode device'
[patent_app_type] => utility
[patent_app_number] => 11/019169
[patent_app_country] => US
[patent_app_date] => 2004-12-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 2767
[patent_no_of_claims] => 11
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0173/20050173713.pdf
[firstpage_image] =>[orig_patent_app_number] => 11019169
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/019169 | Multi-pin light-emitting diode device | Dec 22, 2004 | Abandoned |
Array
(
[id] => 7235494
[patent_doc_number] => 20050139838
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-06-30
[patent_title] => 'Semiconductor device and method for manufacturing semiconductor device'
[patent_app_type] => utility
[patent_app_number] => 11/019768
[patent_app_country] => US
[patent_app_date] => 2004-12-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 13
[patent_no_of_words] => 13263
[patent_no_of_claims] => 28
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0139/20050139838.pdf
[firstpage_image] =>[orig_patent_app_number] => 11019768
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/019768 | Semiconductor device and method for manufacturing semiconductor device | Dec 22, 2004 | Abandoned |
Array
(
[id] => 6994060
[patent_doc_number] => 20050133836
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-06-23
[patent_title] => 'Asymmetric MOS transistor with trench-type gate'
[patent_app_type] => utility
[patent_app_number] => 11/021349
[patent_app_country] => US
[patent_app_date] => 2004-12-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 19
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[patent_no_of_words] => 5442
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[pdf_file] => publications/A1/0133/20050133836.pdf
[firstpage_image] =>[orig_patent_app_number] => 11021349
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/021349 | Method of forming asymmetric MOS transistor with a channel stopping region and a trench-type gate | Dec 22, 2004 | Issued |
Array
(
[id] => 5646026
[patent_doc_number] => 20060131758
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-06-22
[patent_title] => 'Anchored non-solder mask defined ball pad'
[patent_app_type] => utility
[patent_app_number] => 11/022218
[patent_app_country] => US
[patent_app_date] => 2004-12-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
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[patent_no_of_words] => 3325
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0131/20060131758.pdf
[firstpage_image] =>[orig_patent_app_number] => 11022218
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/022218 | Anchored non-solder mask defined ball pad | Dec 21, 2004 | Abandoned |
Array
(
[id] => 386962
[patent_doc_number] => 07304331
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2007-12-04
[patent_title] => 'Nitride semiconductor device such as transverse power FET for high frequency signal amplification or power control'
[patent_app_type] => utility
[patent_app_number] => 11/014869
[patent_app_country] => US
[patent_app_date] => 2004-12-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/304/07304331.pdf
[firstpage_image] =>[orig_patent_app_number] => 11014869
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/014869 | Nitride semiconductor device such as transverse power FET for high frequency signal amplification or power control | Dec 19, 2004 | Issued |
Array
(
[id] => 4629877
[patent_doc_number] => 08008775
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2011-08-30
[patent_title] => 'Post passivation interconnection structures'
[patent_app_type] => utility
[patent_app_number] => 11/017169
[patent_app_country] => US
[patent_app_date] => 2004-12-20
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/08/008/08008775.pdf
[firstpage_image] =>[orig_patent_app_number] => 11017169
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/017169 | Post passivation interconnection structures | Dec 19, 2004 | Issued |
Array
(
[id] => 7036818
[patent_doc_number] => 20050156252
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-07-21
[patent_title] => 'Method for forming a polycide gate and structure of the same'
[patent_app_type] => utility
[patent_app_number] => 11/011598
[patent_app_country] => US
[patent_app_date] => 2004-12-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0156/20050156252.pdf
[firstpage_image] =>[orig_patent_app_number] => 11011598
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/011598 | Method for forming a polycide gate and structure of the same | Dec 14, 2004 | Abandoned |
Array
(
[id] => 7036843
[patent_doc_number] => 20050156277
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-07-21
[patent_title] => 'Semiconductor device'
[patent_app_type] => utility
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[firstpage_image] =>[orig_patent_app_number] => 11011788
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/011788 | Semiconductor device | Dec 14, 2004 | Abandoned |
Array
(
[id] => 7039587
[patent_doc_number] => 20050158976
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-07-21
[patent_title] => 'Floating gate memory cell and forming method'
[patent_app_type] => utility
[patent_app_number] => 11/013089
[patent_app_country] => US
[patent_app_date] => 2004-12-15
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[firstpage_image] =>[orig_patent_app_number] => 11013089
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/013089 | Method for forming polysilicon floating gate | Dec 14, 2004 | Issued |
Array
(
[id] => 5908814
[patent_doc_number] => 20060124953
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-06-15
[patent_title] => 'Semiconductor light emitting device mounting substrates and packages including cavities and cover plates, and methods of packaging same'
[patent_app_type] => utility
[patent_app_number] => 11/011748
[patent_app_country] => US
[patent_app_date] => 2004-12-14
[patent_effective_date] => 0000-00-00
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[pdf_file] => publications/A1/0124/20060124953.pdf
[firstpage_image] =>[orig_patent_app_number] => 11011748
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/011748 | Semiconductor light emitting device mounting substrates and packages including cavities and cover plates, and methods of packaging same | Dec 13, 2004 | Abandoned |
Array
(
[id] => 6988661
[patent_doc_number] => 20050087791
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-04-28
[patent_title] => 'Capacitor of semiconductor memory device that has composite A12O3/HfO2 dielectric layer and method of manufacturing the same'
[patent_app_type] => utility
[patent_app_number] => 11/009198
[patent_app_country] => US
[patent_app_date] => 2004-12-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 5167
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0087/20050087791.pdf
[firstpage_image] =>[orig_patent_app_number] => 11009198
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/009198 | Capacitor of semiconductor memory device that has composite A12O3/HfO2 dielectric layer and method of manufacturing the same | Dec 7, 2004 | Abandoned |