Search

Paul J Killos

Examiner (ID: 6560)

Most Active Art Unit
1206
Art Unit(s)
1623, 1621, 1625, 1206, 1204
Total Applications
2978
Issued Applications
2595
Pending Applications
134
Abandoned Applications
247

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 11425172 [patent_doc_number] => 20170033318 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-02-02 [patent_title] => 'ORGANIC LIGHT EMITTING DIODE DEVICE, MANUFACTURING METHOD THEREOF AND DISPLAY APPARATUS' [patent_app_type] => utility [patent_app_number] => 15/133806 [patent_app_country] => US [patent_app_date] => 2016-04-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 6133 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15133806 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/133806
Organic light emitting diode device, manufacturing method thereof and display apparatus Apr 19, 2016 Issued
Array ( [id] => 11753589 [patent_doc_number] => 09711607 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-07-18 [patent_title] => 'One-dimensional nanostructure growth on graphene and devices thereof' [patent_app_type] => utility [patent_app_number] => 15/130527 [patent_app_country] => US [patent_app_date] => 2016-04-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 69 [patent_no_of_words] => 12358 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15130527 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/130527
One-dimensional nanostructure growth on graphene and devices thereof Apr 14, 2016 Issued
Array ( [id] => 11110913 [patent_doc_number] => 20160307883 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-10-20 [patent_title] => 'SEMICONDUCTOR DEVICE AND RELATED ELECTRONIC DEVICE' [patent_app_type] => utility [patent_app_number] => 15/098889 [patent_app_country] => US [patent_app_date] => 2016-04-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4269 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15098889 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/098889
Semiconductor device and related electronic device Apr 13, 2016 Issued
Array ( [id] => 11028934 [patent_doc_number] => 20160225889 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-08-04 [patent_title] => 'NITRIDE SEMICONDUCTOR DEVICE, PRODUCTION METHOD THEREOF, DIODE, AND FIELD EFFECT TRANSISTOR' [patent_app_type] => utility [patent_app_number] => 15/097888 [patent_app_country] => US [patent_app_date] => 2016-04-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 33 [patent_figures_cnt] => 33 [patent_no_of_words] => 47459 [patent_no_of_claims] => 48 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15097888 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/097888
Nitride semiconductor device, production method thereof, diode, and field effect transistor Apr 12, 2016 Issued
Array ( [id] => 11094108 [patent_doc_number] => 20160291076 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-10-06 [patent_title] => 'FRAMEWORK FOR FAULT DETECTION AND LOCALIZATION IN POWER DISTRIBUTION NETWORKS' [patent_app_type] => utility [patent_app_number] => 15/088971 [patent_app_country] => US [patent_app_date] => 2016-04-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5777 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15088971 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/088971
Framework for fault detection and localization in power distribution networks Mar 31, 2016 Issued
Array ( [id] => 11753598 [patent_doc_number] => 09711618 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-07-18 [patent_title] => 'Fabrication of vertical field effect transistor structure with controlled gate length' [patent_app_type] => utility [patent_app_number] => 15/087074 [patent_app_country] => US [patent_app_date] => 2016-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 29 [patent_no_of_words] => 8994 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15087074 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/087074
Fabrication of vertical field effect transistor structure with controlled gate length Mar 30, 2016 Issued
Array ( [id] => 11279704 [patent_doc_number] => 09496186 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2016-11-15 [patent_title] => 'Uniform height tall fins with varying silicon germanium concentrations' [patent_app_type] => utility [patent_app_number] => 15/085068 [patent_app_country] => US [patent_app_date] => 2016-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4267 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 323 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15085068 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/085068
Uniform height tall fins with varying silicon germanium concentrations Mar 29, 2016 Issued
Array ( [id] => 11687359 [patent_doc_number] => 09685409 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-06-20 [patent_title] => 'Top metal contact for vertical transistor structures' [patent_app_type] => utility [patent_app_number] => 15/082150 [patent_app_country] => US [patent_app_date] => 2016-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 44 [patent_no_of_words] => 5718 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15082150 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/082150
Top metal contact for vertical transistor structures Mar 27, 2016 Issued
Array ( [id] => 11974789 [patent_doc_number] => 20170278943 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-09-28 [patent_title] => 'VERTICAL TRANSISTOR STRUCTURE WITH REDUCED PARASITIC GATE CAPACITANCE' [patent_app_type] => utility [patent_app_number] => 15/082131 [patent_app_country] => US [patent_app_date] => 2016-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 5760 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15082131 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/082131
Vertical transistor structure with reduced parasitic gate capacitance Mar 27, 2016 Issued
Array ( [id] => 11085436 [patent_doc_number] => 20160282400 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-09-29 [patent_title] => 'EQUIPMENT FAILURE PREDICTION SYSTEM, EQUIPMENT FAILURE PREDICTION DEVICE AND EQUIPMENT FAILURE PREDICTION METHOD' [patent_app_type] => utility [patent_app_number] => 15/080758 [patent_app_country] => US [patent_app_date] => 2016-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 11829 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15080758 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/080758
EQUIPMENT FAILURE PREDICTION SYSTEM, EQUIPMENT FAILURE PREDICTION DEVICE AND EQUIPMENT FAILURE PREDICTION METHOD Mar 24, 2016 Abandoned
Array ( [id] => 11444547 [patent_doc_number] => 20170045567 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-02-16 [patent_title] => 'MONITORING METHOD AND SYSTEM OF ARRESTER APPLIED TO SMART SUBSTATION' [patent_app_type] => utility [patent_app_number] => 15/076660 [patent_app_country] => US [patent_app_date] => 2016-03-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3166 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15076660 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/076660
MONITORING METHOD AND SYSTEM OF ARRESTER APPLIED TO SMART SUBSTATION Mar 21, 2016 Abandoned
Array ( [id] => 11365353 [patent_doc_number] => 20170003334 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-01-05 [patent_title] => 'RAPID ONLINE DIAGNOSIS METHOD OF OPEN-CIRCUIT FAULT FOR HIGH-POWER RECTIFIER' [patent_app_type] => utility [patent_app_number] => 15/076160 [patent_app_country] => US [patent_app_date] => 2016-03-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4009 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15076160 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/076160
RAPID ONLINE DIAGNOSIS METHOD OF OPEN-CIRCUIT FAULT FOR HIGH-POWER RECTIFIER Mar 20, 2016 Abandoned
Array ( [id] => 15890569 [patent_doc_number] => 10651645 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-05-12 [patent_title] => Secured fault detection in a power substation [patent_app_type] => utility [patent_app_number] => 15/075845 [patent_app_country] => US [patent_app_date] => 2016-03-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 19 [patent_no_of_words] => 11775 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 239 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15075845 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/075845
Secured fault detection in a power substation Mar 20, 2016 Issued
Array ( [id] => 11116441 [patent_doc_number] => 20160313414 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-10-27 [patent_title] => 'INFORMATION PROCESSOR, STORAGE MEDIUM, AND INFORMATION PROCESSING METHOD FOR MAGNETIC PROPERTY ANALYSIS' [patent_app_type] => utility [patent_app_number] => 15/074261 [patent_app_country] => US [patent_app_date] => 2016-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 9012 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15074261 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/074261
INFORMATION PROCESSOR, STORAGE MEDIUM, AND INFORMATION PROCESSING METHOD FOR MAGNETIC PROPERTY ANALYSIS Mar 17, 2016 Abandoned
Array ( [id] => 11898252 [patent_doc_number] => 09768192 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-09-19 [patent_title] => 'Three-dimensional memory device containing annular etch-stop spacer and method of making thereof' [patent_app_type] => utility [patent_app_number] => 15/071575 [patent_app_country] => US [patent_app_date] => 2016-03-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 24 [patent_no_of_words] => 12376 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15071575 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/071575
Three-dimensional memory device containing annular etch-stop spacer and method of making thereof Mar 15, 2016 Issued
Array ( [id] => 11967063 [patent_doc_number] => 20170271217 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-09-21 [patent_title] => 'IN-SITU CALIBRATION STRUCTURES AND METHODS OF USE IN SEMICONDUCTOR PROCESSING' [patent_app_type] => utility [patent_app_number] => 15/070384 [patent_app_country] => US [patent_app_date] => 2016-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 5441 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15070384 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/070384
In-situ calibration structures and methods of use in semiconductor processing Mar 14, 2016 Issued
Array ( [id] => 11983797 [patent_doc_number] => 20170287952 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-10-05 [patent_title] => 'ARRAY SUBSTRATE, DISPLAY PANEL AND DISPLAY DEVICE' [patent_app_type] => utility [patent_app_number] => 15/513743 [patent_app_country] => US [patent_app_date] => 2016-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3966 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15513743 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/513743
Array substrate, display panel and display device Mar 13, 2016 Issued
Array ( [id] => 11103945 [patent_doc_number] => 20160300915 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-10-13 [patent_title] => 'METHOD FOR FABRICATING NANOGAP ELECTRODES, NANOGAP ELECTRODES ARRAY, AND NANODEVICE WITH THE SAME' [patent_app_type] => utility [patent_app_number] => 15/069879 [patent_app_country] => US [patent_app_date] => 2016-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 29 [patent_figures_cnt] => 29 [patent_no_of_words] => 8768 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15069879 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/069879
METHOD FOR FABRICATING NANOGAP ELECTRODES, NANOGAP ELECTRODES ARRAY, AND NANODEVICE WITH THE SAME Mar 13, 2016 Abandoned
Array ( [id] => 11085860 [patent_doc_number] => 20160282826 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-09-29 [patent_title] => 'OPERATIONAL CONTROL MANAGEMENT APPARATUS AND OPERATIONAL CONTROL MANAGEMENT METHOD' [patent_app_type] => utility [patent_app_number] => 15/064949 [patent_app_country] => US [patent_app_date] => 2016-03-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 46 [patent_figures_cnt] => 46 [patent_no_of_words] => 36828 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15064949 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/064949
Operational control management apparatus and operational control management method Mar 8, 2016 Issued
Array ( [id] => 11363876 [patent_doc_number] => 20170001857 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-01-05 [patent_title] => 'SENSOR ELEMENT AND METHOD OF MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 15/059803 [patent_app_country] => US [patent_app_date] => 2016-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 8639 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15059803 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/059803
SENSOR ELEMENT AND METHOD OF MANUFACTURING THE SAME Mar 2, 2016 Abandoned
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