Paul J Killos
Examiner (ID: 14937)
Most Active Art Unit | 1206 |
Art Unit(s) | 1623, 1621, 1625, 1204, 1206 |
Total Applications | 2978 |
Issued Applications | 2595 |
Pending Applications | 134 |
Abandoned Applications | 247 |
Applications
Application number | Title of the application | Filing Date | Status |
---|---|---|---|
Array
(
[id] => 6385021
[patent_doc_number] => 20020179963
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-12-05
[patent_title] => 'Semiconductor integrated circuit device having single-element type non-volatile memory elements'
[patent_app_type] => new
[patent_app_number] => 10/164626
[patent_app_country] => US
[patent_app_date] => 2002-06-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 7564
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 291
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0179/20020179963.pdf
[firstpage_image] =>[orig_patent_app_number] => 10164626
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/164626 | Method of manufacturing a semiconductor memory device having a memory cell portion including MISFETs with a floating gate and a peripheral circuit portion with MISFETs | Jun 9, 2002 | Issued |
Array
(
[id] => 1002716
[patent_doc_number] => 06909173
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2005-06-21
[patent_title] => 'Flexible substrate, semiconductor device, imaging device, radiation imaging device and radiation imaging system'
[patent_app_type] => utility
[patent_app_number] => 10/165319
[patent_app_country] => US
[patent_app_date] => 2002-06-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 41
[patent_no_of_words] => 8329
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 70
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/909/06909173.pdf
[firstpage_image] =>[orig_patent_app_number] => 10165319
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/165319 | Flexible substrate, semiconductor device, imaging device, radiation imaging device and radiation imaging system | Jun 9, 2002 | Issued |
Array
(
[id] => 1009730
[patent_doc_number] => 06900492
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2005-05-31
[patent_title] => 'Integrated circuit device with P-type gate memory cell having pedestal contact plug and peripheral circuit'
[patent_app_type] => utility
[patent_app_number] => 10/164008
[patent_app_country] => US
[patent_app_date] => 2002-06-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 52
[patent_figures_cnt] => 52
[patent_no_of_words] => 18652
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 419
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/900/06900492.pdf
[firstpage_image] =>[orig_patent_app_number] => 10164008
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/164008 | Integrated circuit device with P-type gate memory cell having pedestal contact plug and peripheral circuit | Jun 6, 2002 | Issued |
Array
(
[id] => 6254447
[patent_doc_number] => 20020185681
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-12-12
[patent_title] => 'Power MOS transistor having capability for setting substrate potential independently of source potential'
[patent_app_type] => new
[patent_app_number] => 10/160098
[patent_app_country] => US
[patent_app_date] => 2002-06-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 25
[patent_figures_cnt] => 25
[patent_no_of_words] => 12600
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 317
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0185/20020185681.pdf
[firstpage_image] =>[orig_patent_app_number] => 10160098
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/160098 | Power MOS transistor having capability for setting substrate potential independently of source potential | Jun 3, 2002 | Issued |
Array
(
[id] => 6785765
[patent_doc_number] => 20030137004
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-07-24
[patent_title] => 'Floating gate transistors and methods of forming floating gate transistors'
[patent_app_type] => new
[patent_app_number] => 10/164048
[patent_app_country] => US
[patent_app_date] => 2002-06-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 3323
[patent_no_of_claims] => 69
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 73
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0137/20030137004.pdf
[firstpage_image] =>[orig_patent_app_number] => 10164048
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/164048 | Methods of forming floating gate transistors using STI | Jun 3, 2002 | Issued |
Array
(
[id] => 6254589
[patent_doc_number] => 20020185719
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-12-12
[patent_title] => 'Chip-scaled package and manufacturing method thereof'
[patent_app_type] => new
[patent_app_number] => 10/159348
[patent_app_country] => US
[patent_app_date] => 2002-05-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 2651
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 105
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0185/20020185719.pdf
[firstpage_image] =>[orig_patent_app_number] => 10159348
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/159348 | Chip-scaled package having a sealed connection wire | May 30, 2002 | Issued |
Array
(
[id] => 6666741
[patent_doc_number] => 20030111724
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-06-19
[patent_title] => 'Inspection device for inspecting the position of trademark on integrated circuit'
[patent_app_type] => new
[patent_app_number] => 10/156129
[patent_app_country] => US
[patent_app_date] => 2002-05-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 1419
[patent_no_of_claims] => 3
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 97
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0111/20030111724.pdf
[firstpage_image] =>[orig_patent_app_number] => 10156129
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/156129 | Inspection device for inspecting the position of trademark on integrated circuit | May 28, 2002 | Abandoned |
Array
(
[id] => 6820066
[patent_doc_number] => 20030218227
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-11-27
[patent_title] => 'METHOD OF FABRICATING MICRO-MIRROR SWITCHING DEVICE'
[patent_app_type] => new
[patent_app_number] => 10/154279
[patent_app_country] => US
[patent_app_date] => 2002-05-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 2664
[patent_no_of_claims] => 43
[patent_no_of_ind_claims] => 12
[patent_words_short_claim] => 17
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0218/20030218227.pdf
[firstpage_image] =>[orig_patent_app_number] => 10154279
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/154279 | Method of fabricating micro-mirror switching device | May 22, 2002 | Issued |
Array
(
[id] => 6539238
[patent_doc_number] => 20020137271
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-09-26
[patent_title] => 'Flash memory with ultra thin vertical body transistors'
[patent_app_type] => new
[patent_app_number] => 10/152649
[patent_app_country] => US
[patent_app_date] => 2002-05-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
[patent_figures_cnt] => 18
[patent_no_of_words] => 9170
[patent_no_of_claims] => 81
[patent_no_of_ind_claims] => 16
[patent_words_short_claim] => 80
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0137/20020137271.pdf
[firstpage_image] =>[orig_patent_app_number] => 10152649
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/152649 | Flash memory with ultra thin vertical body transistors | May 19, 2002 | Issued |
Array
(
[id] => 6493984
[patent_doc_number] => 20020190292
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-12-19
[patent_title] => 'Semiconductor devices, memory systems and electronic apparatuses'
[patent_app_type] => new
[patent_app_number] => 10/150498
[patent_app_country] => US
[patent_app_date] => 2002-05-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 19
[patent_figures_cnt] => 19
[patent_no_of_words] => 11125
[patent_no_of_claims] => 49
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 104
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0190/20020190292.pdf
[firstpage_image] =>[orig_patent_app_number] => 10150498
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/150498 | Semiconductor devices, memory systems and electronic apparatuses with improved latch up suppression | May 15, 2002 | Issued |
Array
(
[id] => 7448329
[patent_doc_number] => 20040164384
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-08-26
[patent_title] => 'Surface excited device package including a substrate having a vibration-permitted cavity'
[patent_app_type] => new
[patent_app_number] => 10/147239
[patent_app_country] => US
[patent_app_date] => 2002-05-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 27
[patent_figures_cnt] => 27
[patent_no_of_words] => 4194
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 66
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0164/20040164384.pdf
[firstpage_image] =>[orig_patent_app_number] => 10147239
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/147239 | Surface excited device package including a substrate having a vibration-permitted cavity | May 13, 2002 | Abandoned |
Array
(
[id] => 6415320
[patent_doc_number] => 20020125544
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-09-12
[patent_title] => 'Semiconductor memory device with sidewalls'
[patent_app_type] => new
[patent_app_number] => 10/140292
[patent_app_country] => US
[patent_app_date] => 2002-05-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 13
[patent_no_of_words] => 5221
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 61
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0125/20020125544.pdf
[firstpage_image] =>[orig_patent_app_number] => 10140292
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/140292 | Semiconductor memory device with sidewalls | May 7, 2002 | Abandoned |
Array
(
[id] => 6646816
[patent_doc_number] => 20030075745
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-04-24
[patent_title] => 'Semiconductor integrated circuit, MOS transistor, semicoductor device, robot and management system of lottery'
[patent_app_type] => new
[patent_app_number] => 10/138569
[patent_app_country] => US
[patent_app_date] => 2002-05-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 15
[patent_no_of_words] => 7360
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 56
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0075/20030075745.pdf
[firstpage_image] =>[orig_patent_app_number] => 10138569
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/138569 | Semiconductor integrated circuit, MOS transistor, semicoductor device, robot and management system of lottery | May 5, 2002 | Abandoned |
Array
(
[id] => 6733372
[patent_doc_number] => 20030011007
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-01-16
[patent_title] => 'Semiconductor memory device'
[patent_app_type] => new
[patent_app_number] => 10/137289
[patent_app_country] => US
[patent_app_date] => 2002-05-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 14
[patent_no_of_words] => 6676
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 172
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0011/20030011007.pdf
[firstpage_image] =>[orig_patent_app_number] => 10137289
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/137289 | Semiconductor device with insulating gate surrounded by impurity layers | May 2, 2002 | Issued |
Array
(
[id] => 5782929
[patent_doc_number] => 20020158343
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-10-31
[patent_title] => 'Semiconductor device and wiring tape for semiconductor device'
[patent_app_type] => new
[patent_app_number] => 10/134364
[patent_app_country] => US
[patent_app_date] => 2002-04-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 7454
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 122
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0158/20020158343.pdf
[firstpage_image] =>[orig_patent_app_number] => 10134364
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/134364 | Semiconductor device and wiring tape for semiconductor device | Apr 29, 2002 | Abandoned |
Array
(
[id] => 1197794
[patent_doc_number] => 06727563
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2004-04-27
[patent_title] => 'Offset-reduced hall element'
[patent_app_type] => B1
[patent_app_number] => 10/129039
[patent_app_country] => US
[patent_app_date] => 2002-04-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 6
[patent_no_of_words] => 5047
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 175
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/727/06727563.pdf
[firstpage_image] =>[orig_patent_app_number] => 10129039
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/129039 | Offset-reduced hall element | Apr 29, 2002 | Issued |
Array
(
[id] => 1264413
[patent_doc_number] => 06660591
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2003-12-09
[patent_title] => 'Trench-gate semiconductor devices having a channel-accommodating region and their methods of manufacture'
[patent_app_type] => B2
[patent_app_number] => 10/134209
[patent_app_country] => US
[patent_app_date] => 2002-04-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 26
[patent_no_of_words] => 8637
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 201
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/660/06660591.pdf
[firstpage_image] =>[orig_patent_app_number] => 10134209
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/134209 | Trench-gate semiconductor devices having a channel-accommodating region and their methods of manufacture | Apr 25, 2002 | Issued |
Array
(
[id] => 6690897
[patent_doc_number] => 20030038329
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-02-27
[patent_title] => 'Photodetector and its operating modes'
[patent_app_type] => new
[patent_app_number] => 10/128509
[patent_app_country] => US
[patent_app_date] => 2002-04-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 3224
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 2
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[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0038/20030038329.pdf
[firstpage_image] =>[orig_patent_app_number] => 10128509
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/128509 | Photodetector and its operating modes | Apr 23, 2002 | Abandoned |
Array
(
[id] => 1352546
[patent_doc_number] => 06583508
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2003-06-24
[patent_title] => 'Integrated circuit with active regions having varying contact arrangements'
[patent_app_type] => B2
[patent_app_number] => 10/128068
[patent_app_country] => US
[patent_app_date] => 2002-04-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 4
[patent_no_of_words] => 2215
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 148
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/583/06583508.pdf
[firstpage_image] =>[orig_patent_app_number] => 10128068
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/128068 | Integrated circuit with active regions having varying contact arrangements | Apr 22, 2002 | Issued |
Array
(
[id] => 6807237
[patent_doc_number] => 20030197176
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-10-23
[patent_title] => 'Silicon on insulator standoff and method for manufacture thereof'
[patent_app_type] => new
[patent_app_number] => 10/128368
[patent_app_country] => US
[patent_app_date] => 2002-04-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 3056
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 112
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0197/20030197176.pdf
[firstpage_image] =>[orig_patent_app_number] => 10128368
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/128368 | Silicon on insulator standoff and method for manufacture thereof | Apr 21, 2002 | Abandoned |