Search

Paul J Killos

Examiner (ID: 14937)

Most Active Art Unit
1206
Art Unit(s)
1623, 1621, 1625, 1204, 1206
Total Applications
2978
Issued Applications
2595
Pending Applications
134
Abandoned Applications
247

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 6618352 [patent_doc_number] => 20020064921 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-05-30 [patent_title] => 'Semiconductor integrated circuit device and a method of manufacturing the same' [patent_app_type] => new [patent_app_number] => 09/967928 [patent_app_country] => US [patent_app_date] => 2001-10-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 36 [patent_figures_cnt] => 36 [patent_no_of_words] => 11820 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0064/20020064921.pdf [firstpage_image] =>[orig_patent_app_number] => 09967928 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/967928
Semiconductor integrated circuit device and a method of manufacturing the same Oct 1, 2001 Abandoned
Array ( [id] => 6781147 [patent_doc_number] => 20030062594 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-04-03 [patent_title] => 'Anti-fuse structure with low on-state resistance and low off-state leakage' [patent_app_type] => new [patent_app_number] => 09/682628 [patent_app_country] => US [patent_app_date] => 2001-10-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 2732 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 36 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0062/20030062594.pdf [firstpage_image] =>[orig_patent_app_number] => 09682628 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/682628
Anti-fuse structure with low on-state resistance and low off-state leakage Sep 30, 2001 Abandoned
Array ( [id] => 1245685 [patent_doc_number] => 06677203 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-01-13 [patent_title] => 'Method of manufacturing a semiconductor memory device which reduces the minimum area requirements of the device' [patent_app_type] => B2 [patent_app_number] => 09/964521 [patent_app_country] => US [patent_app_date] => 2001-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 53 [patent_no_of_words] => 5880 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 308 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/677/06677203.pdf [firstpage_image] =>[orig_patent_app_number] => 09964521 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/964521
Method of manufacturing a semiconductor memory device which reduces the minimum area requirements of the device Sep 27, 2001 Issued
Array ( [id] => 6108564 [patent_doc_number] => 20020171781 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-11-21 [patent_title] => 'Thin film transistor array substrate for liquid crystal display' [patent_app_type] => new [patent_app_number] => 09/964645 [patent_app_country] => US [patent_app_date] => 2001-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4055 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 224 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0171/20020171781.pdf [firstpage_image] =>[orig_patent_app_number] => 09964645 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/964645
Thin film transistor array substrate for liquid crystal display Sep 27, 2001 Issued
Array ( [id] => 6781120 [patent_doc_number] => 20030062567 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-04-03 [patent_title] => 'Non volatile dielectric memory cell structure with high dielectric constant capacitive coupling layer' [patent_app_type] => new [patent_app_number] => 09/966638 [patent_app_country] => US [patent_app_date] => 2001-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3285 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0062/20030062567.pdf [firstpage_image] =>[orig_patent_app_number] => 09966638 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/966638
Non volatile dielectric memory cell structure with high dielectric constant capacitive coupling layer Sep 27, 2001 Abandoned
Array ( [id] => 6398714 [patent_doc_number] => 20020036726 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-03-28 [patent_title] => 'Liquid crystal display device and method for manufacturing the same' [patent_app_type] => new [patent_app_number] => 09/962444 [patent_app_country] => US [patent_app_date] => 2001-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5049 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0036/20020036726.pdf [firstpage_image] =>[orig_patent_app_number] => 09962444 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/962444
Liquid crystal display device with minimum OHMIC contact between reflective and transparent electrodes Sep 25, 2001 Issued
Array ( [id] => 785751 [patent_doc_number] => 06989588 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-01-24 [patent_title] => 'Semiconductor device including molded wireless exposed drain packaging' [patent_app_type] => utility [patent_app_number] => 09/963049 [patent_app_country] => US [patent_app_date] => 2001-09-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 2018 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 170 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/989/06989588.pdf [firstpage_image] =>[orig_patent_app_number] => 09963049 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/963049
Semiconductor device including molded wireless exposed drain packaging Sep 23, 2001 Issued
Array ( [id] => 6327312 [patent_doc_number] => 20020197800 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-12-26 [patent_title] => 'A SEMICONDUCTOR INTEGRATED CIRCUIT AND FABRICATION PROCESS HAVING COMPENSATED STRUCTURES TO REDUCE MANUFACTURING DEFECTS ' [patent_app_type] => new [patent_app_number] => 09/960399 [patent_app_country] => US [patent_app_date] => 2001-09-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 120 [patent_figures_cnt] => 120 [patent_no_of_words] => 18003 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 11 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0197/20020197800.pdf [firstpage_image] =>[orig_patent_app_number] => 09960399 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/960399
A SEMICONDUCTOR INTEGRATED CIRCUIT AND FABRICATION PROCESS HAVING COMPENSATED STRUCTURES TO REDUCE MANUFACTURING DEFECTS Sep 23, 2001 Abandoned
Array ( [id] => 1054454 [patent_doc_number] => 06859247 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-02-22 [patent_title] => 'Electro-optical apparatus and projection-type display apparatus' [patent_app_type] => utility [patent_app_number] => 09/956031 [patent_app_country] => US [patent_app_date] => 2001-09-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 17 [patent_no_of_words] => 11724 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 211 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/859/06859247.pdf [firstpage_image] =>[orig_patent_app_number] => 09956031 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/956031
Electro-optical apparatus and projection-type display apparatus Sep 19, 2001 Issued
Array ( [id] => 6667399 [patent_doc_number] => 20030112382 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-06-19 [patent_title] => 'Liquid crystal display device' [patent_app_type] => new [patent_app_number] => 09/956343 [patent_app_country] => US [patent_app_date] => 2001-09-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 11173 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0112/20030112382.pdf [firstpage_image] =>[orig_patent_app_number] => 09956343 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/956343
Liquid crystal display device Sep 19, 2001 Abandoned
Array ( [id] => 6334173 [patent_doc_number] => 20020033501 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-03-21 [patent_title] => 'Nonvolatile semiconductor memory and method of fabricating the same' [patent_app_type] => new [patent_app_number] => 09/955076 [patent_app_country] => US [patent_app_date] => 2001-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 4882 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0033/20020033501.pdf [firstpage_image] =>[orig_patent_app_number] => 09955076 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/955076
Nonvolatile semiconductor memory and method of fabricating the same Sep 18, 2001 Abandoned
Array ( [id] => 1398913 [patent_doc_number] => 06537880 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-03-25 [patent_title] => 'Method of fabricating a high density NAND stacked gate flash memory device having narrow pitch isolation and large capacitance between control and floating gates' [patent_app_type] => B1 [patent_app_number] => 09/950609 [patent_app_country] => US [patent_app_date] => 2001-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 2162 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 235 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/537/06537880.pdf [firstpage_image] =>[orig_patent_app_number] => 09950609 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/950609
Method of fabricating a high density NAND stacked gate flash memory device having narrow pitch isolation and large capacitance between control and floating gates Sep 12, 2001 Issued
Array ( [id] => 6237295 [patent_doc_number] => 20020043613 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-04-18 [patent_title] => 'Illuminance sensor chip and illuminance sensor incorporating the same' [patent_app_type] => new [patent_app_number] => 09/949728 [patent_app_country] => US [patent_app_date] => 2001-09-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5002 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0043/20020043613.pdf [firstpage_image] =>[orig_patent_app_number] => 09949728 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/949728
Illuminance sensor chip and illuminance sensor incorporating the same Sep 11, 2001 Abandoned
Array ( [id] => 1038621 [patent_doc_number] => 06873385 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-03-29 [patent_title] => 'Liquid crystal display with selectively placed barriers' [patent_app_type] => utility [patent_app_number] => 09/949633 [patent_app_country] => US [patent_app_date] => 2001-09-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 0 [patent_no_of_words] => 8782 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/873/06873385.pdf [firstpage_image] =>[orig_patent_app_number] => 09949633 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/949633
Liquid crystal display with selectively placed barriers Sep 11, 2001 Issued
Array ( [id] => 6750604 [patent_doc_number] => 20030045124 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-03-06 [patent_title] => 'Method for protecting sidewalls of etched openings to prevent via poisoning' [patent_app_type] => new [patent_app_number] => 09/947788 [patent_app_country] => US [patent_app_date] => 2001-09-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2992 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0045/20030045124.pdf [firstpage_image] =>[orig_patent_app_number] => 09947788 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/947788
Method for protecting sidewalls of etched openings to prevent via poisoning Sep 5, 2001 Issued
Array ( [id] => 6334180 [patent_doc_number] => 20020033502 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-03-21 [patent_title] => 'Low voltage flash memory and method for manufacturing same' [patent_app_type] => new [patent_app_number] => 09/947419 [patent_app_country] => US [patent_app_date] => 2001-09-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2941 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0033/20020033502.pdf [firstpage_image] =>[orig_patent_app_number] => 09947419 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/947419
Method for manufacturing low voltage flash memory Sep 4, 2001 Issued
Array ( [id] => 1130042 [patent_doc_number] => 06791657 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-09-14 [patent_title] => 'Liquid crystal display having liquid crystal cell gap variation' [patent_app_type] => B2 [patent_app_number] => 09/947120 [patent_app_country] => US [patent_app_date] => 2001-09-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 24 [patent_no_of_words] => 7534 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/791/06791657.pdf [firstpage_image] =>[orig_patent_app_number] => 09947120 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/947120
Liquid crystal display having liquid crystal cell gap variation Sep 4, 2001 Issued
Array ( [id] => 6459078 [patent_doc_number] => 20020020871 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-02-21 [patent_title] => 'Static NVRAM with ultra thin tunnel oxides' [patent_app_type] => new [patent_app_number] => 09/945398 [patent_app_country] => US [patent_app_date] => 2001-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 9282 [patent_no_of_claims] => 64 [patent_no_of_ind_claims] => 12 [patent_words_short_claim] => 48 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0020/20020020871.pdf [firstpage_image] =>[orig_patent_app_number] => 09945398 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/945398
Static NVRAM with ultra thin tunnel oxides Aug 29, 2001 Issued
Array ( [id] => 7386547 [patent_doc_number] => 20040021170 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-02-05 [patent_title] => 'Method and apparatus for injecting charge onto the floating gate of a nonvolatile memory cell' [patent_app_type] => new [patent_app_number] => 09/942338 [patent_app_country] => US [patent_app_date] => 2001-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 29 [patent_figures_cnt] => 29 [patent_no_of_words] => 15508 [patent_no_of_claims] => 93 [patent_no_of_ind_claims] => 21 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0021/20040021170.pdf [firstpage_image] =>[orig_patent_app_number] => 09942338 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/942338
Method and apparatus for injecting charge onto the floating gate of a nonvolatile memory cell Aug 27, 2001 Abandoned
Array ( [id] => 6657219 [patent_doc_number] => 20030077868 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-04-24 [patent_title] => 'Method with trench source to increase the coupling of source to floating gate in split gate flash' [patent_app_type] => new [patent_app_number] => 09/940158 [patent_app_country] => US [patent_app_date] => 2001-08-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 3323 [patent_no_of_claims] => 41 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0077/20030077868.pdf [firstpage_image] =>[orig_patent_app_number] => 09940158 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/940158
Method with trench source to increase the coupling of source to floating gate in split gate flash Aug 26, 2001 Issued
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