Paul J Killos

Array ( [id] => 6502577 [patent_doc_number] => 20020025626 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-02-28 [patent_title] => 'Integrated dielectric and method' [patent_app_type] => new [patent_app_number] => 09/941264 [patent_app_country] => US [patent_app_date] => 2001-08-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3875 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 54 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0025/20020025626.pdf [firstpage_image] =>[orig_patent_app_number] => 09941264 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1047289 [patent_doc_number] => 06864529 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-03-08 [patent_title] => 'Thin film transistor memory device' [patent_app_type] => utility [patent_app_number] => 09/934548 [patent_app_country] => US [patent_app_date] => 2001-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 25 [patent_no_of_words] => 6525 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/864/06864529.pdf [firstpage_image] =>[orig_patent_app_number] => 09934548 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6221976 [patent_doc_number] => 20020003305 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-01-10 [patent_title] => 'Semiconductor integrated circuit device including an interlayer insulating film formed under a bonding pad and arranged to prevent peeling of the bonding pad' [patent_app_type] => new [patent_app_number] => 09/934596 [patent_app_country] => US [patent_app_date] => 2001-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 43 [patent_figures_cnt] => 43 [patent_no_of_words] => 12686 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0003/20020003305.pdf [firstpage_image] =>[orig_patent_app_number] => 09934596 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1421250 [patent_doc_number] => 06509605 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-01-21 [patent_title] => 'Flash memory cell having a flexible element' [patent_app_type] => B1 [patent_app_number] => 09/913818 [patent_app_country] => US [patent_app_date] => 2001-08-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 6 [patent_no_of_words] => 1554 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/509/06509605.pdf [firstpage_image] =>[orig_patent_app_number] => 09913818 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6998432 [patent_doc_number] => 20010052612 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-12-20 [patent_title] => 'Memory integrated circuitry' [patent_app_type] => new [patent_app_number] => 09/930787 [patent_app_country] => US [patent_app_date] => 2001-08-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2256 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0052/20010052612.pdf [firstpage_image] =>[orig_patent_app_number] => 09930787 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5999983 [patent_doc_number] => 20020028541 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-03-07 [patent_title] => 'Dense arrays and charge storage devices, and methods for making same' [patent_app_type] => new [patent_app_number] => 09/927648 [patent_app_country] => US [patent_app_date] => 2001-08-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 88 [patent_figures_cnt] => 88 [patent_no_of_words] => 44626 [patent_no_of_claims] => 482 [patent_no_of_ind_claims] => 65 [patent_words_short_claim] => 16 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0028/20020028541.pdf [firstpage_image] =>[orig_patent_app_number] => 09927648 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1212715 [patent_doc_number] => 06709927 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-03-23 [patent_title] => 'Process for treating ONO dielectric film of a floating gate memory cell' [patent_app_type] => B1 [patent_app_number] => 09/927134 [patent_app_country] => US [patent_app_date] => 2001-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 1613 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/709/06709927.pdf [firstpage_image] =>[orig_patent_app_number] => 09927134 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6028776 [patent_doc_number] => 20020017692 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-02-14 [patent_title] => 'Non-volatile semiconductor memory device having memory cell array suitable for high density and high integration' [patent_app_type] => new [patent_app_number] => 09/925418 [patent_app_country] => US [patent_app_date] => 2001-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 11981 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0017/20020017692.pdf [firstpage_image] =>[orig_patent_app_number] => 09925418 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5997133 [patent_doc_number] => 20020027259 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-03-07 [patent_title] => 'Highly integrated and reliable DRAM and its manufacture' [patent_app_type] => new [patent_app_number] => 09/920927 [patent_app_country] => US [patent_app_date] => 2001-08-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 38 [patent_figures_cnt] => 38 [patent_no_of_words] => 14971 [patent_no_of_claims] => 61 [patent_no_of_ind_claims] => 20 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0027/20020027259.pdf [firstpage_image] =>[orig_patent_app_number] => 09920927 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6060291 [patent_doc_number] => 20020030211 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-03-14 [patent_title] => 'Semiconductor memory circuitry including die sites sized for 256M to 275M memory cells in a 12\" wafer' [patent_app_type] => new [patent_app_number] => 09/917844 [patent_app_country] => US [patent_app_date] => 2001-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 25 [patent_no_of_words] => 13555 [patent_no_of_claims] => 40 [patent_no_of_ind_claims] => 14 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0030/20020030211.pdf [firstpage_image] =>[orig_patent_app_number] => 09917844 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 767133 [patent_doc_number] => 07009232 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-03-07 [patent_title] => 'Semiconductor memory circuitry including die sites sized for 256M to 275M memory cells in an 8-inch wafer' [patent_app_type] => utility [patent_app_number] => 09/915508 [patent_app_country] => US [patent_app_date] => 2001-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 36 [patent_no_of_words] => 13459 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/009/07009232.pdf [firstpage_image] =>[orig_patent_app_number] => 09915508 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6158057 [patent_doc_number] => 20020146886 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-10-10 [patent_title] => 'Self aligned method of forming a semiconductor memory array of floating gate memory cells with vertical control gate sidewalls and insulation spacers, and a memory array made thereby' [patent_app_type] => new [patent_app_number] => 09/916618 [patent_app_country] => US [patent_app_date] => 2001-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 6070 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 175 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0146/20020146886.pdf [firstpage_image] =>[orig_patent_app_number] => 09916618 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6920597 [patent_doc_number] => 20010028082 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-10-11 [patent_title] => 'Semiconductor integrated circuit device and method of manufacturing the same' [patent_app_type] => new [patent_app_number] => 09/880959 [patent_app_country] => US [patent_app_date] => 2001-06-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 38 [patent_figures_cnt] => 38 [patent_no_of_words] => 16649 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0028/20010028082.pdf [firstpage_image] =>[orig_patent_app_number] => 09880959 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6883964 [patent_doc_number] => 20010038119 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-11-08 [patent_title] => 'Semiconductor integrated circuit device having single-element type non-volatile memory elements' [patent_app_type] => new [patent_app_number] => 09/873451 [patent_app_country] => US [patent_app_date] => 2001-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 7534 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 439 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0038/20010038119.pdf [firstpage_image] =>[orig_patent_app_number] => 09873451 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1343971 [patent_doc_number] => 06590254 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-07-08 [patent_title] => 'Nonvolatile semiconductor memory device and method of manufacturing the same' [patent_app_type] => B2 [patent_app_number] => 09/860345 [patent_app_country] => US [patent_app_date] => 2001-05-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 34 [patent_no_of_words] => 8034 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 178 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/590/06590254.pdf [firstpage_image] =>[orig_patent_app_number] => 09860345 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1389958 [patent_doc_number] => 06544845 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-04-08 [patent_title] => 'Methods of fabricating nonvolatile memory devices including bird\'s beak oxide' [patent_app_type] => B2 [patent_app_number] => 09/854790 [patent_app_country] => US [patent_app_date] => 2001-05-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 21 [patent_no_of_words] => 5231 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 291 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/544/06544845.pdf [firstpage_image] =>[orig_patent_app_number] => 09854790 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7026691 [patent_doc_number] => 20010013662 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-08-16 [patent_title] => 'Pad layout and lead layout in semiconductor device' [patent_app_type] => new [patent_app_number] => 09/835520 [patent_app_country] => US [patent_app_date] => 2001-04-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 10877 [patent_no_of_claims] => 66 [patent_no_of_ind_claims] => 12 [patent_words_short_claim] => 48 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0013/20010013662.pdf [firstpage_image] =>[orig_patent_app_number] => 09835520 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6895644 [patent_doc_number] => 20010026434 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-10-04 [patent_title] => 'Configuration for connecting power semiconductor chips in modules' [patent_app_type] => new [patent_app_number] => 09/803759 [patent_app_country] => US [patent_app_date] => 2001-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1886 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0026/20010026434.pdf [firstpage_image] =>[orig_patent_app_number] => 09803759 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1104974 [patent_doc_number] => 06812136 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-11-02 [patent_title] => 'Method of making a semiconductor device having a multilayer metal film of titanium/titanium nitride/tungsten/tungsten carbide' [patent_app_type] => B2 [patent_app_number] => 09/799674 [patent_app_country] => US [patent_app_date] => 2001-03-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 17 [patent_no_of_words] => 5123 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/812/06812136.pdf [firstpage_image] =>[orig_patent_app_number] => 09799674 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1392878 [patent_doc_number] => 06541279 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-04-01 [patent_title] => 'Method for forming an integrated circuit' [patent_app_type] => B2 [patent_app_number] => 09/798310 [patent_app_country] => US [patent_app_date] => 2001-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 17 [patent_no_of_words] => 16804 [patent_no_of_claims] => 41 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 31 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/541/06541279.pdf [firstpage_image] =>[orig_patent_app_number] => 09798310 [rel_patent_id] =>[rel_patent_doc_number] =>)